Electrical test prediction using hybrid metrology and machine learning

Breton, Mary; Chao, Robin; Muthinti, Gangadhara Raja; Pena, Abraham Arceo de la; Simon, Jacques; Cepler, Aron; Sendelbach, Matthew; Gaudiello, John G.; Emans, Susan; Shifrin, Michael; Etzioni, Yoav; Urenski, Ronen; Lee, Wei Ti

doi:10.1117/12.2261091

Cited by 10 publications

(9 citation statements)

References 3 publications

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“…ML solution, an attractive tool for process control, monitoring purposes, and electrical-test (e-test) prediction, involves cross-combining the inline scatterometry spectra with reference data. 5,13,14 Then a mathematical estimator is generated using a set of ML algorithm. The data used to create the mathematical estimator is called the training set, and once the training is completed and shows a good correlation to the reference data, the scatterometry spectra are used to measure and predict the parameters of interest.…”

Section: Scatterometry and Ml: Space CD Measurement Of 1d Featurementioning

confidence: 99%

Investigating metal oxide resists for patterning 28-nm pitch structures using single exposure extreme ultraviolet: defectivity, electrical test, and voltage contrast study

Sarkar

Das

Carballo

et al. 2022

J. Micro/Nanopattern. Mats. Metro.

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Background: To keep up with the logic area scaling, back-end-of-line (BEOL) structures are reduced to smaller pitches, requiring faster and reliable metrology and defect detection solution.Aim: Metrology and detailed defect inspection at the early phases of process optimization.Approach: Single exposure (SE) 0.33NA extreme ultraviolet (EUV) lithography was used along with a bright field mask for patterning in a metal damascene process flow of BEOL structures. We also used a dual damascene process flow for voltage contrast (VC) metrology study.Results: Scatterometry technique, together with machine learning (ML), allowed us to have fast and accurate measurements of line-space (LS) and tip-to-tip (T2T) critical dimension (CD), and prediction of electrical performance. We demonstrated characterization results of stochastic defects across various test structures of 28-nm pitch devices. We used a large-area electron beam (e-beam) tool for high-speed large-area inspection which provided us with the quick feedback on defect signatures and scope for further root cause analysis. On a separate dual damascene integration flow, we used VC metrology to capture different failure modes in the patterning process of metal trenches with tight T2T and corresponding overlapping vias. Conclusions:We studied the impact of stochastic resist defects on electrical measurements of meander (MR) and fork-fork (FF) structures, and showed that large electrical test structures, built with a relatively simple patterning flow, can be used at the early stages of resist and patterning development, as the electrical failures are almost exclusively caused by the resist defects. In the dual damascene flow, we demonstrated that VC metrology is useful to determine the design rule parameters and capture different failure mechanisms.

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Section: Scatterometry and Ml: Space CD Measurement Of 1d Featurementioning

confidence: 99%

Investigating metal oxide resists for patterning 28-nm pitch structures using single exposure extreme ultraviolet: defectivity, electrical test, and voltage contrast study

Sarkar

Das

Carballo

et al. 2022

J. Micro/Nanopattern. Mats. Metro.

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“…We formulate the problem of finding the best augmentation policy as a discrete search problem. The operations we searched were rotation (5,10,15,20,25,30,35,40,45), flipping (horizontal and vertical), shifting (width and height), shearing range (horizontal and vertical), and zooming (1%-20%). In total, we have 46 operations in the search space.…”

Section: ) Policy Searchmentioning

confidence: 99%

“…It also tests the electrical motion state of each semiconductor chip generated on a wafer. To improve the yield rate of processing, engineers define and classify the forms of a defective wafer, and identify a wafer map, resulting in the EDS test [15]. Fig 1 shows an example of a wafer map.…”

Section: Introductionmentioning

confidence: 99%

Unsupervised Pre-Training of Imbalanced Data for Identification of Wafer Map Defect Patterns

et al. 2021

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Visual defect inspection and classification are significant steps of most manufacturing processes in the semiconductor and electronics industries. Known and unknown defects on wafer maps tend to cluster, and these spatial patterns provide valuable process information for supporting manufacturing in determining the root causes of abnormal processes. In previous studies, data augmentation-based deep learning (DL) techniques were most commonly used for the identification of wafer map defect patterns (WMDP). Data augmentation is an effective technique for improving the accuracy of modern image classifiers. However, current data augmentation implementations were manually designed for the WMDP problem. In this study, we propose a DL-based method with automatic data augmentation for the WMDP task. Basically, it focuses on learning effective discriminative features, from wafer maps, through a deep network structure. The network consists of a convolution-based variational autoencoder (CVAE) sequentially. First, we pre-trained the CVAE on large training data in an unsupervised manner. Second, we fine-tuned the encoder of the CVAE, which was followed by a neural network (NN) classifier, in a supervised manner. Additionally, we describe a simple procedure for automatically searching for improved data augmentation policies. The policy mainly consists of five image processing functions: rotation, flipping, shifting, shearing range, and zooming. The effectiveness of the proposed method was demonstrated through experimental results obtained from a simulation dataset and a real-world wafer map dataset (WM-811K). This study provides guidance for the application of deep learning in semiconductor manufacturing processes to improve product quality and yield.INDEX TERMS Classification, convolutional variational autoencoder, deep learning, imbalanced data, neural network, unsupervised pre-training, variational autoencoder, wafer map defect patterns.

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“…A basic schematic of the phase-modulated ellipsometer principle is presented in Fig. 1 and the exact configuration can be found in [2]. For phase-modulated ellipsometer, the raw data gathered are the ellipsometry parameters Is and Ic, which values are then bound between -1 and 1.…”

Section: A Spectroscopic Ellipsometersmentioning

confidence: 99%

Spectroscopic Ellipsometry Imaging for Process Deviation Detection via Machine Learning Approach

Alcaire¹,

Cunff²,

Gredy³

et al. 2020

2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)

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Spectroscopic ellipsometry is a very sensitive metrology technique to accurately measure the thickness and the refractive index of the different layers present on specific dedicated metrology targets. In parallel, optical defectivity techniques are widely implemented in production lines to inspect a large number of dies and catch physical and patterning defects during the process flow. It becomes then of interest to explore a new approach overlapping metrology and defectivity by using the sensitivity of metrology tools on a full wafer scale. In our case, spectroscopic ellipsometry's optical response was collected directly on the dies to capture specific deviations such as film properties and thickness variation. This is an innovative strategy that requires a model-less approach, combining an automatic ellipsometry mapping generation and a smart classification via a machine learning algorithm. In this paper, we will present such approach on two industrial use cases and explain how an image classification algorithm can be implemented to automatically detect the process drift on the latter.

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Electrical test prediction using hybrid metrology and machine learning

Cited by 10 publications

References 3 publications

Investigating metal oxide resists for patterning 28-nm pitch structures using single exposure extreme ultraviolet: defectivity, electrical test, and voltage contrast study

Investigating metal oxide resists for patterning 28-nm pitch structures using single exposure extreme ultraviolet: defectivity, electrical test, and voltage contrast study

Unsupervised Pre-Training of Imbalanced Data for Identification of Wafer Map Defect Patterns

Spectroscopic Ellipsometry Imaging for Process Deviation Detection via Machine Learning Approach

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