Electrical transport properties in electroless-etched Si nanowire field-effect transistors

Moon, Kyeong-Ju; Choi, Jong Bo; Lee, Tae-Il; Ham, Moon‐Ho; Maeng, W. J.; Hwang, Inchan; Myoung, Jae‐Min

doi:10.1016/j.mee.2010.04.015

Cited by 16 publications

(7 citation statements)

References 24 publications

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“…Silicon nanowires (SiNWs) have been proposed to be used as sensors − and field effect transistors. − Moreover, SiNWs find applications more and more in the energy chain, either for energy storage as efficient batteries or as energy harvesting devices like thermal electrical generators, , electrochemical cells for generation of hydrogen by water splitting, and most importantly as solar cells. , …”

Section: Introductionmentioning

confidence: 99%

Multiple Core–Shell Silicon Nanowire-Based Heterojunction Solar Cells

et al. 2013

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Silicon nanowire-based solar cells received increasing attention due to their enhanced light harvesting properties and the potential to use lowcost materials to produce solar cells comparable with those on costly monocrystalline counterparts. It is essential to improve the performance of nanowire solar cells by suppressing surface recombination. A multiple core (crystalline silicon nanowires)−shell silicon nanowire-based heterojunction solar cell has been fabricated to deal with this problem. To this end, an ultrathin passivating Al 2 O 3 tunnel layer was deposited on the highly doped ptype a-Si:H emitter prior to a transparent conducting oxide by atomic layer deposition (ALD). Both open circuit voltage and current density increase significantly due to the insertion of the ultrathin Al 2 O 3 layer. An efficiency of 10.0% has been reached by using this multiple core−shell structure.

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Section: Introductionmentioning

confidence: 99%

Multiple Core–Shell Silicon Nanowire-Based Heterojunction Solar Cells

et al. 2013

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“…In fact, the residual Ag particles are bene-cial for the device performance as demonstrated in the previous study. 22 For surface passivation of NWs, post-annealing was carried out at 800 C in an O 2 atmosphere for 10 min.…”

Section: Methodsmentioning

confidence: 99%

White light emission from heterojunction diodes based on surface-oxidized porous Si nanowire arrays and amorphous In-Ga-Zn-O capping

Moon

Lee

et al. 2014

Nanoscale

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A novel heterojunction white light emitting diode (LED) structure based on an array of vertically aligned surface-passivated p-type porous Si nanowires (PSiNWs) with n-type amorphous In-Ga-Zn-O (a-IGZO) capping is introduced. PSiNWs were initially synthesized by electroless etching of p-type Si (100) wafers assisted by Ag nanoparticle catalysts and then surface-passivated by thermal oxidation. The nanowires synthesized by metal-assisted electroless etching were found to have longitudinally varying nanoporous morphologies due to differences in the duration of exposure to etching environment. These PSiNWs were optically active with orange red photoluminescence consisting of dark red to yellow emissions attributable to quantum confinement effects and to modified band structures. The LED structures emitted visible white light while exhibiting rectifying current-voltage characteristics. The white light emission was found to be the result of the combination of dark red to yellow emissions originating from the quantum confinement effect within the PSiNWs and green to blue emissions due to the oxygen-deficiency-related recombination centers introduced during the surface oxidation.

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“…After defining the electrode patterns through EBL, the samples were rinsed in dilute HF solution (HF/H 2 O, 1:10) for 30 s to etch away the native oxide on the Si NW surface. Metal electrodes were then deposited using an e-beam evaporator; 25 200 nm Ni and 200 nm Al were used to ensure ohmic contacts with the p-and n-Si NWs, respectively. The p-Si NW FETs were annealed at 500 °C in Ar for 2 min to improve the Ni−Si contacts.…”

Section: ■ Experimental Detailsmentioning

confidence: 99%

p–n Crossed Nanojunctions from Electroless-Etched Si Nanowires

Huang²,

Ruan³

et al. 2016

J. Phys. Chem. C

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Electroless etching was used to prepare p-and n-Si nanowire (NW) arrays from Si wafers, with the lengths of the Si NW arrays varied by controlling the etching time. The etching rate was ∼150 nm/min up to 300 min but decreased notably, to 32 nm/min, thereafter. Transmission electron microscopy confirmed that the Si NWs were single-crystalline and aligned along the [001] direction. The dumbbell separation of 0.13 nm, observed using high-resolution highangle annular-dark field scanning transmission electron microscopy, corresponded to Si atom arrangements projected along the [1−10] zone axis. A statistical study revealed that the average carrier concentrations of the p-and n-Si NW devices were 1.15 × 10 18 and 2.61 × 10 17 cm −3 , respectively, while the average carrier mobilities were 6.66 × 10 −3 and 5.41 × 10 −3 cm 2 V −1 s −1 , respectively. A subsequently prepared p−n Si NW crossed nanojunction exhibited rectifying behavior typical of a p−n junction. Thus the preparation of Si NW arrays from Si wafers through electroless etching appears to be an inexpensive, low-temperature technique for the mass production of various device architectures and applications.

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Electrical transport properties in electroless-etched Si nanowire field-effect transistors

Cited by 16 publications

References 24 publications

Multiple Core–Shell Silicon Nanowire-Based Heterojunction Solar Cells

Multiple Core–Shell Silicon Nanowire-Based Heterojunction Solar Cells

White light emission from heterojunction diodes based on surface-oxidized porous Si nanowire arrays and amorphous In-Ga-Zn-O capping

p–n Crossed Nanojunctions from Electroless-Etched Si Nanowires

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