Electrochemically Controlled Thinning of Silicon

Waggener, H.A.

doi:10.1002/j.1538-7305.1970.tb01783.x

Cited by 88 publications

(23 citation statements)

References 1 publication

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“…This approach, first proposed by Waggener [31], is one of the most commonly used methods for fabricating features with a reproducible thickness. The structure normally consists of a p-type silicon wafer with an n-type epi-layer (Fig.…”

Section: ) Electrochemically Controlled P/n Etch Stopmentioning

confidence: 99%

Galvanic cell formation: a review of approaches to silicon etching for sensor fabrication

et al. 2001

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A brief review of silicon etching and electrochemistry provides an introduction to galvanic cell formation in silicon/metal contacts in aqueous electrolyte solutions. It is shown that such galvanic cells, which operate under open-circuit conditions, can be used to perform most of the functions of anodic etching and passivation. Applications relevant to sensor fabrication are described. These include the control of surface morphology, etch-stop mechanisms, and microporous and macroporous etching. In addition, surface structuring by open-circuit photoetching, a process which also depends on galvanic effects, is considered.

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Section: ) Electrochemically Controlled P/n Etch Stopmentioning

confidence: 99%

Galvanic cell formation: a review of approaches to silicon etching for sensor fabrication

et al. 2001

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“…The p-type substrate therefore dissolves away leaving behind the n-type layer (97). This can be done by creating a thin n-type layer on a p-type substrate.…”

Section: Fig 7 the Formation Of Membranes Using The Resistivity Gramentioning

confidence: 99%

“…Advantages.--This passivation technique was first used by Waggener (97) to produce thin membranes by dissolving p-type wafers with n-type diffused layers in a KOH solution. Jackson and Wise (98) and Gealer (99) were also able to produce thin membranes from p-type wafers with n-type epitaxial layers using the EPW etching solution described in the Heavily doped stop layer section.…”

Section: Fig 7 the Formation Of Membranes Using The Resistivity Gramentioning

confidence: 99%

The Fabrication of Thin, Freestanding, Single‐Crystal, Semiconductor Membranes

Lee¹

1990

J. Electrochem. Soc.

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Freestanding, single-crystal, semiconductor membranes with thicknesses in the range of a few tens of nanometers to tens of microns are of increasing technological interest today. Their applications range from high speed electronic devices to electromechanical devices and pressure sensors. This review paper identifies two general classes of techniques for producing such thin membranes: dissolution of single-crystal wafers, and direct growth of single-crystal membranes. Numerous specific techniques in each general class are discussed. The discussion of each technique includes a brief explanation of the reason why it works, a description of the actual experimental implementation, an analysis of the range of thickness that can be produced, and the crystalline and electrical quality of the membranes. Unusual difficulties with implementing a technique, or special advantages of a technique are also noted. Since this review is intended to aid in the selection of a technique for producing thin semiconductor membranes when one has a particular application in mind, note is made of those applications for which the membranes produced with each technique are particularly well suited. ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 128.197.26.12 Downloaded on 2015-06-27 to IP ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 128.197.26.12 Downloaded on 2015-06-27 to IP

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“…The ECE is commonly used to fabricate different structures, such as membranes, with good thickness reproducibility [12,13]. This etch stop technique requires external power from an electrical power supply and therefore a special holder is used to protect the front side of the wafer from the etching solution and to realize electrical contacts with the wafer.…”

Section: Electrochemically Controlled Pn Etch Stopmentioning

confidence: 99%

Electroviscous Effect in Liquid Crystals

Honda

Kurosawa

Sasada

1979

Jpn. J. Appl. Phys.

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This paper presents a novel method for creating through-wafer interconnects via an anisotropically etched groove in a (100)-silicon wafer. The idea is based on the realization of interconnection lines on the inclined sidewalls of the anisotropically etched grooves, which transfer the metalization to the back side of the wafer without open through-holes. The process itself is compatible with standard semiconductor technology and can be applied at the wafer level resulting in low packaging costs. All post interconnect processes are developed independently and can be added to any IC fabrication process. They are performed at the back side of the wafer at the packaging step, so during this processing the front side of the wafer can be protected from scratches and pollution. The key feature of the method presented is the coating of the anisotropically etched grooves with a polyimide and an electrodeposited photoresist. Further, methods to improve the photoresist uniformity over three-dimensional structures are discussed. Copper interconnects have been realized to show the feasibility of this through-wafer technique for front-to-back electrical interconnections. The thickness of the copper interconnects has been increased by copper electroplating to reduce their electrical resistance further and to increase their mechanical strength.

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Electrochemically Controlled Thinning of Silicon

Cited by 88 publications

References 1 publication

Galvanic cell formation: a review of approaches to silicon etching for sensor fabrication

Galvanic cell formation: a review of approaches to silicon etching for sensor fabrication

The Fabrication of Thin, Freestanding, Single‐Crystal, Semiconductor Membranes

Electroviscous Effect in Liquid Crystals

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