Electron-beam direct writing using RD2000N for fabrication of nanodevices

Dutta, Amit; Lee, S. P.; Hayafune, Yoshinori; Oda, Shunri

doi:10.1116/1.1323969

Cited by 9 publications

(6 citation statements)

References 13 publications

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“…The EB process uses an RD2000N negative resist, which has high sensitivity to electron exposure and high resistance to subsequent dry etching. 14 The active area of the device results from the proportionately higher resistance due to the smaller cross sectional area of the narrow channel. Series resistance outside of the gate area is reduced by using 50 m wide leads.…”

Section: Methodsmentioning

confidence: 99%

Emission lifetime of polarizable charge stored in nano-crystalline Si based single-electron memory

Hinds

Yamanaka

Oda

2001

Journal of Applied Physics

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The lifetime of the emission of a single electron stored in a nanocrystalline Si ͑nc-Si͒ dot has been studied in order to understand the physical processes for memory applications. A small active area field effect transistor channel ͑50ϫ25 nm͒ is defined by electron-beam lithography on a thin ͑20 nm͒ silicon-on-insulator channel and allows for the electrical isolation of a single nc-Si dot. Remote plasma enhanced chemical vapor deposition is used to form 8Ϯ1 nm diameter nc-Si dots in the gas phase from a pulsed SiH 4 source. Electrons stored in a dot results in an observed discrete threshold shift of 90 mV. Analysis of lifetime as a function of applied potential and temperature show the dot to be an acceptor site with nearly Poisson time distributions. An observed 1/T 2 dependence of lifetime is consistent with a direct tunneling process, and interface states are not the dominant mechanism for electron storage in this device structure. Median emission lifetimes as a function of applied gate bias are readily modeled by the polarizability of an electron in a delocalized bound state over the entire semiconducting dot.

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Section: Methodsmentioning

confidence: 99%

Emission lifetime of polarizable charge stored in nano-crystalline Si based single-electron memory

Hinds

Yamanaka

Oda

2001

Journal of Applied Physics

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“…Although RD-2000N was primarily developed as a deep ultraviolet resist, it shows good sensitivity to EB exposure [11]. This resist also offers good endurance characteristic to reactive ion etching (RIE), high-resolution and simple handling.…”

Section: Device Fabricationmentioning

confidence: 99%

Study of Single-Charge Polarization on a Pair of Charge Qubits Integrated Onto a Silicon Double Single-Electron Transistor Readout

Kawata

Tsuchiya

Oda

et al. 2008

IEEE Trans. Nanotechnology

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Abstract-This paper reports on integration of two Si charge quantum bits (qubits) and series-connected double single-electron transistors (DSETs) as a readout for the first time. We design and fabricate the DSETs composed of double quantum dots (DQDs) connected in series with two side gates patterned on a silicon-on-insulator substrate.The individual SETs are sufficiently sensitive to detect single-charge polarization on the adjacent charge qubits. The fabricated DSETs are characterized at the temperature of 4.2 K by changing the gate voltages applied to two side gates.The measured Coulomb oscillation characteristics exhibit a clearly-defined hexagon pattern, manifesting that the patterned DQDs of the DSETs indeed act as interacting charging islands. These results agree very well with the results of equivalent circuit simulation combined with three-dimensional capacitance simulation. Furthermore, we simulate how single-charge configurations on two charge qubits are sensed with the DSETs by using the measured electrical characteristics for the DSET and the equivalent model. Finally, the scaling-up properties of the proposed system to multiple single-electron transistors (MSETs) is discussed by simulating Triple Single-Electron Transistors (TSETs) with triple qubits.

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“…Although primarily developed as a deep ultraviolet resist, RD-2000N shows good sensitivity to EB exposure. 10) This resist offers good etching resistance and simple resist handling. The initial SOI layer thickness was reduced to 40 nm by repeated thermal oxidation and wet etching.…”

Section: Set Fabricationmentioning

confidence: 99%

Integration of Tunnel-Coupled Double Nanocrystalline Silicon Quantum Dots with a Multiple-Gate Single-Electron Transistor

Kawata

Khalafalla

Usami

et al. 2007

jjap

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We report on integration of double nanocrystalline silicon quantum dots (nc-Si QDs) of approximately 10 nm in diameter onto the multiple-gate single-electron transistor (SET) used as a highly-sensitive charge polarization detector. The SET with a single charging island is first patterned lithographically on silicon-on-insulator, and the multiple-gate bias dependence of the Coulomb current oscillation is characterized at 4.2 K. The coupling capacitance parameters between the SET charging island and the multiple-gate are estimated and compared with those obtained by using the three-dimensional capacitance simulation. Double nc-Si QDs are then deposited in the immediate vicinity of the charging island of the SET by using the very-high frequency plasma deposition technique. We perform the single-electron circuit simulations and demonstrate that only AEe charge polarization of the double QDs can be sensed as a shift of the Coulomb oscillation peaks.

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Electron-beam direct writing using RD2000N for fabrication of nanodevices

Cited by 9 publications

References 13 publications

Emission lifetime of polarizable charge stored in nano-crystalline Si based single-electron memory

Emission lifetime of polarizable charge stored in nano-crystalline Si based single-electron memory

Study of Single-Charge Polarization on a Pair of Charge Qubits Integrated Onto a Silicon Double Single-Electron Transistor Readout

Integration of Tunnel-Coupled Double Nanocrystalline Silicon Quantum Dots with a Multiple-Gate Single-Electron Transistor

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