Electron effective masses in an InGaAs quantum well with InAs and GaAs inserts

Kulbachinskii, V. A.; Yuzeeva, N. A.; Галиев, Г. Б.; Климов, Е. А.; Васильевский, И. С.; Хабибуллин, Р. А.; Пономарев, Д. С.

doi:10.1088/0268-1242/27/3/035021

Cited by 32 publications

(19 citation statements)

References 30 publications

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“…InGaAs was considered for use as the n-type high-mobility channel material because it has higher electron mobility and smaller electron effective mass than that of silicon [1][2][3]. The complementary metal oxide semiconductor (CMOS) structure can be realized by integrating III-V n-MOSFETs and Ge p-MOSFETs on a Si CMOS platform [4][5][6].…”

Section: Introductionmentioning

confidence: 99%

Reliability of Buried InGaAs Channel n-MOSFETs With an InP Barrier Layer and Al2O3 Dielectric Under Positive Bias Temperature Instability Stress

Gao

et al. 2020

Front. Phys.

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The positive bias temperature instability (PBTI) reliability of buried InGaAs channel n-MOSFETs with an InP barrier layer and Al 2 O 3 gate dielectric under medium field (2.7 MV/cm) and high field (5.0 MV/cm) are investigated in this paper. The Al 2 O 3 /InP interface of the insertion of an InP barrier layer has fewer interface and border traps compared to that of the Al 2 O 3 /InGaAs interface. The subthreshold slope, transconductance, and shift of V g are studied by using the direct-current I d -V g measurements under the PBTI stress. The experimental results show that the degradation of positive V g under the medium field stress is mainly caused by the acceptor trap, while the donor trap under the high field stress become dominant in the subthreshold region, which leads to the negative shift in V g . The medium field stress-induced acceptor traps are attributed by the InP barrier layer in the subthreshold region, resulting that the low leakage current can be achieved in the buried InGaAs channel n-MOSFETs with an InP barrier layer compared to the surface InGaAs channel n-MOSFETs.

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Section: Introductionmentioning

confidence: 99%

Reliability of Buried InGaAs Channel n-MOSFETs With an InP Barrier Layer and Al2O3 Dielectric Under Positive Bias Temperature Instability Stress

Gao

et al. 2020

Front. Phys.

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“…At present, semiconductor heterocompounds are regarded as a functional basis for creating micro-and nanoelectronic devices with improved frequency characteristics, in particular, high electron mobility transistors (HEMTs) [1][2][3] and monolithic integrated circuits of microwave and millimeter-wave low-noise amplifiers. Moreover, such heterostructures may be promising in manufacturing p-i-n photodiodes and for spintronics equipment and optoelectronic applications.…”

Section: Introductionmentioning

confidence: 99%

High-resolution X-ray diffractometry and transmission electron microscopy as applied to the structural study of InAlAs/InGaAs/InAlAs multilayer transistor nanoheterostructures

Галиев

Климов

Имамов

et al. 2016

J. Synch. Investig.

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InAlAs/InGaAs/InAlAs nanoheterostructures with different structures of metamorphic buffer layer and quantum well, which were grown by means of molecular-beam epitaxy on GaAs and InP substrates, are investigated. The laboratory technology of the growth of the given nanoheterostructures with predicted properties is perfected. The potential of an approach based on the comprehensive analysis of experimental data obtained via different techniques, namely, X-ray diffractometry, electron diffraction, scanning electron microscopy, high-resolution transmission electron microscopy, and atomic-force microscopy is studied. The metamorphic buffer layer design is improved on the basis of the results of the performed investigations. A method whereby balanced-mismatched superlattices are introduced directly inside the metamorphic buffer layer is proposed. It is established that the technological parameters of the growth of nanoheterostructures affect their structural perfection and electrophysical properties.

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“…In order to improve μ e one should vary the design of the heterostructure, in particular the QW and the barrier layer. One of the approaches is the introduction of additional InAs and/or GaAs layers that lead to decreasing of electron effective mass in the QW but enhance scattering on the interface roughness [4]. Previously it was shown that AlGaAs/InGaAs heterostructures with the QW containing AlAs inserts that serve as the barriers for optical phonons may reduce the scattering rate up to 5-6 times in comparison with the QW without these inserts and increase electron mobility as a consequence [5,6].…”

Section: Introductionmentioning

confidence: 99%

Quantum and transport scattering times in AlGaAs/InGaAs nanoheterostructures with AlAs inserts in the spacer layer

Галиев¹,

Васильевский²,

Klimov³

et al. 2016

Lith. J. Phys.

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The influence of nano-sized AlAs inserts in the spacer layer AlGaAs on scattering mechanisms of AlGaAs/InGaAs nanoheterostructures has been considered. It was shown that the introduction of AlAs lead to mobility enhancement up to 20%. The ratio of transport-to-quantum scattering times revealed that in the case of the spacer with AlAs inserts the scattering on ionized Sidonors is strongly decreased in comparison to the spacer without AlAs.

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Electron effective masses in an InGaAs quantum well with InAs and GaAs inserts

Cited by 32 publications

References 30 publications

Reliability of Buried InGaAs Channel n-MOSFETs With an InP Barrier Layer and Al2O3 Dielectric Under Positive Bias Temperature Instability Stress

Reliability of Buried InGaAs Channel n-MOSFETs With an InP Barrier Layer and Al2O3 Dielectric Under Positive Bias Temperature Instability Stress

High-resolution X-ray diffractometry and transmission electron microscopy as applied to the structural study of InAlAs/InGaAs/InAlAs multilayer transistor nanoheterostructures

Quantum and transport scattering times in AlGaAs/InGaAs nanoheterostructures with AlAs inserts in the spacer layer

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