Electron mobility enhancement using ultrathin pure Ge on Si substrate

Yeo, Chia Ching; Cho, Byung Jin; Gao, Fei; Lee, S.J.; Lee, M.H.; Yu, Cheng; Liu, C.W.; Tang, Lei; Lee, T.W.

doi:10.1109/led.2005.855420

Cited by 52 publications

(9 citation statements)

References 11 publications

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“…While Ge is considered a promising candidate to replace Si in future high-mobility CMOS devices, 7,8 the low solid solubility of dopants in Ge is a major obstacle. 9 In has attracted recent interest as a potential p-type dopant in Ge due to a low activation energy of 0.0112 eV.…”

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confidence: 99%

Enhanced electrical activation in In-implanted Ge by C co-doping

Feng

Kremer

Sprouster

et al. 2015

Applied Physics Letters

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At high dopant concentrations in Ge, electrically activating all implanted dopants is a major obstacle in the fulfillment of high-performance Ge-channel complementary metal oxide semiconductor devices. In this letter, we demonstrate a significant increase in the electrically-active dopant fraction in In-implanted Ge by co-doping with the isovalent element C. Electrical measurements have been correlated with x-ray absorption spectroscopy and transmission electron microscopy results in addition to density functional theory simulations. With C þ In co-doping, the electrically active fraction was doubled and tripled at In concentrations of 0.2 and 0.7 at. %, respectively. This marked improvement was the result of C-In pair formation such that In-induced strain in the Ge lattice was reduced while the precipitation of In and the formation of In-V clusters were both suppressed. V

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mentioning

confidence: 99%

Enhanced electrical activation in In-implanted Ge by C co-doping

Feng

Kremer

Sprouster

et al. 2015

Applied Physics Letters

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“…The reason for the carrier mobility degradation in a device is ascribed to the fact that the device contributions including the interface trap states, surface roughness scattering, and vertical‐field‐induced mobility degradation are accounted for in the field‐effect mobility. [ 11,43,44 ] Nevertheless, the carrier mobility ratio between the bulk InAs and Si FETs remains ≈31 in the given two cases with similar L g (5–8 µm), [ 1,12 ] and thus the InAs FETs still have better device performance than the Si counterparts. The µ FE ratio between the InAs and Si NWFET is still as high as 22 with similar D NW (≈20 nm) and L g (2–7 µm), and the corresponding values are 6000 and 270 cm 2 V −1 s −1 , respectively.…”

Section: Resultsmentioning

confidence: 99%

“…Bulk Material InAs [11] 40 000 --Si [6] 1350 --Bulk FET InAs [11] 5500 5 -Si [12] 180 8 -NW FET InAs [43] 6000 7 18…”

Section: Reducing Diametermentioning

confidence: 99%

“…[ 1,8 ] Especially, InAs has been regarded as one of the most prominent III‐V compounds for replacing Si as the n ‐type channel in the CMOS due to its ultrahigh electron mobility. [ 9,10 ] Both the observed electron Hall mobility µ e in bulk InAs and the electron mobility in the bulk InAs FET are nearly 30 times higher than those of the bulk Si counterparts, [ 10–12 ] leading to a higher on‐state current ( I on ). [ 1 ]…”

Section: Introductionmentioning

confidence: 99%

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Symmetric and Excellent Scaling Behavior in Ultrathinn‐ andp‐Type Gate‐All‐Around InAs Nanowire Transistors

Yang

et al. 2023

Adv Funct Materials

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Complementary metal‐oxide‐semiconductor (CMOS) field‐effect transistors (FETs) are the key component of a chip. Bulk indium arsenide (InAs) owns nearly 30 times higher electron mobility µe than silicon but suffers from a much lower hole mobility µh (µe/µh = 80), thus unsuited to CMOS application with a single material. Through the accurate ab initio quantum‐transport simulations, the performance gap between the NMOS and PMOS is significantly narrowed is predicted and even vanished in the sub‐2‐nm‐diameter gate‐all‐around (GAA) InAs nanowires (NW) FETs because the inversion of the light and heavy hole bands occurs when the diameter is shorter than 3 nm. It is further proposed several feasible strategies for further improving the performance symmetry in the GAA InAs NWFETs. Short‐channel effects are effectively depressed in the symmetric n‐ and p‐type GAA InAs NWFETs till the gate length is scaled down to 2 nm according to the standards of the International Technology Roadmap for Semiconductors. Therefore, the ultrasmall GAA InAs NWFETs possess tremendous prospects in CMOS integrated circuits.

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“…High mobility materials, such as SiGe, exhibit lower temperature susceptibility tolerance compared to Si, a characteristic attributed to the challenges in controlling thermal treatment in these new materials, as demonstrated by recent studies. 4,5) Boron is widely used as a p-type dopant in silicon and germanium. The activation of implanted boron in silicon shallow junctions is of particular interest because the boron diffusion during the annealing currently limits the junction depth.…”

Section: Introductionmentioning

confidence: 99%

Study on dopant activation and EOT impact in HKMG stacks using microwave annealing with different frequencies

Divya,

Chen,

Lee

et al. 2024

Jpn. J. Appl. Phys.

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We have examined the dopant activation levels of various materials(Si, SiGe & Ge) annealed at two different frequency i.e., 2.45GHz and 5.8GHz microwave annealing (MWA) with the aim of identifying a material-targeted annealing method that will minimize the annealing process of high thermal budget. Furthermore, we also fabricated high-k/metal gate MOSCAP structure annealed at 2.45GHz and 5.8GHz MWA as the post-metallization annealing process. The results show that microwave annealing at 2.45GHz is more efficient than high frequency 5.8GHz MWA at 3000W in minimizing the interface trapped charged and the reduction in leakage current density. However, there is slight clear reduction in capacitance as the frequency increased to 5.8GHz resulting in increase of interfacial layer thickness. Due to undesirable effects such as Al diffusion into the dielectric layer, microwave annealing at 2.45GHz demonstrates great a potential candidate as a post-metallization annealing method for high-k/metal gate structures.

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Electron mobility enhancement using ultrathin pure Ge on Si substrate

Cited by 52 publications

References 11 publications

Enhanced electrical activation in In-implanted Ge by C co-doping

Enhanced electrical activation in In-implanted Ge by C co-doping

Symmetric and Excellent Scaling Behavior in Ultrathinn‐ andp‐Type Gate‐All‐Around InAs Nanowire Transistors

Study on dopant activation and EOT impact in HKMG stacks using microwave annealing with different frequencies

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