Electron trapping in noncrystalline remote plasma deposited Hf-aluminate alloys for gate dielectric applications

Abstract

Articles you may be interested inEffects of denuded zone of Si ( 111 ) surface on current conduction and charge trapping of HfO x N y gate dielectric in metal-oxide-semiconductor devices Appl. Phys. Lett. 85, 4723 (2004); 10.1063/1.1819994Effects of plasma nitridation of Al 2 O 3 interlayer on thermal stability, fixed charge density, and interfacial trap states of HfO 2 gate dielectric films grown by atomic layer deposition

Growth and characterization of Hf–aluminate high-k gate dielectric ultrathin films with equivalent oxide thickness less than 10 Å

“…Transmission electron microscopy observation of Hf-Al-O films showed that the amorphous structure of Hf-Al-O films was stable under rapid thermal annealing at temperatures up to at least 1000°C. Capacitance-voltage measurement of a 38 Å Hf-Al-O film revealed that the relative permittivity of the film was about 16. Such a film showed very low leakage current density of 4.6ϫ10 Ϫ3 A/cm 2 at 1 V gate bias.…”

“…15 Electrical properties such as electron trapping and band alignment in amorphous Hf-Al-O have also been reported. 16,17 However, the understanding of thermodynamic stability and interfacial structure of the Hf-Al-O thin film is still limited. In this article we report the synthesis and characterization of ultrathin Hf-Al-O films for high-k gate dielectric application with equivalent oxide thickness less than 10 Å.…”

Study of interfacial reaction and its impact on electric properties of Hf–Al–O high-k gate dielectric thin films grown on Si

“…This Hf silicide reaction is not usually seen in other deposition techniques such as jet-vapor-deposition, 14 atomic layer deposition [15][16][17] and chemical vapor deposition, 20 where the oxygen ͑or water vapor͒ and high temperature are involved during deposition. A sufficient oxygen source and high temperature result in significant SiO 2 interfacial layer formation and thus the silicidation is suppressed.…”

Electrical Characterization of High-K Dielectric Gates for Microelectronic Devices

“…A number of high-k materials have been investigated as candidates to replace the SiO2 as gate dielectric, being Al2O3 and HfO2 among the most studied ones [3][4][5], since both have a larger permittivity than SiO2 and are thermodynamically stable in contact with silicon. The electrical characteristics of the as-deposited layers of these materials, however, exhibit large negative fixed charge and interface state densities and charge trapping as compared to SiO2, although these characteristics can be improved by including an intermediate oxide between the highk layer and the silicon substrate [6][7][8] or by high-temperature post-deposition processes. [9][10][11][12][13].…”

“…In addition to binary oxides, laminates of them show an improvement of the electrical characteristics as compared to the single oxide layers [14]. In particular, Al2O3-HfO2 laminates and alloys benefit from the higher k of HfO2 and the higher crystallization temperature of Al2O3 [15,16] In this chapter we review the standard techniques as well as the new ones which we have developed for the electrical characterization of very thin insulating films of high k dielectrics for metal-insulator-semiconductor (MIS) gate and metal-insulator-metal (MIM) capacitor applications. These techniques have been conceived to provide detailed information of defects existing in the insulator bulk itself and interface traps appearing at the insulator-The FBT approach consists of a systematic study of flat-band voltage transients occurring in high-k dielectric-based metal-insulator-semiconductor (MIS) structures.…”