Electronic Effect Resistive Switching Memories

Chen, An

doi:10.1002/9781118958254.ch09

Cited by 5 publications

(1 citation statement)

References 111 publications

(194 reference statements)

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“…As an example, creating/erasing the domain walls was postulated to be responsible for RS in BFO nano-dots [ 27 ]. Though a pure electronic trapping/detrapping explanation of RS has been proposed for the explanation of the RS in BFO [ 6 ] similar to other materials [ 33 ], this hypothesis is not popular. Despite these efforts, the final point in this discussion of RS origin in BFO is not set for now.…”

Section: Introductionmentioning

confidence: 99%

Spatially-Resolved Study of the Electronic Transport and Resistive Switching in Polycrystalline Bismuth Ferrite

Abramov

Slautin

Pryakhina

et al. 2023

Sensors

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Ferroelectric materials attract much attention for applications in resistive memory devices due to the large current difference between insulating and conductive states and the ability of carefully controlling electronic transport via the polarization set-up. Bismuth ferrite films are of special interest due to the combination of high spontaneous polarization and antiferromagnetism, implying the possibility to provide multiple physical mechanisms for data storage and operations. Macroscopic conductivity measurements are often hampered to unambiguously characterize the electric transport, because of the strong influence of the diverse material microstructure. Here, we studied the electronic transport and resistive switching phenomena in polycrystalline bismuth ferrite using advanced conductive atomic force microscopy (CAFM) at different temperatures and electric fields. The new approach to the CAFM spectroscopy and corresponding data analysis are proposed, which allow deep insight into the material band structure at high lateral resolution. Contrary to many studies via macroscopic methods, postulating electromigration of the oxygen vacancies, we demonstrate resistive switching in bismuth ferrite to be caused by the pure electronic processes of trapping/releasing electrons and injection of the electrons by the scanning probe microscopy tip. The electronic transport was shown to be comprehensively described by the combination of the space charge limited current model, while a Schottky barrier at the interface is less important due to the presence of the built-in subsurface charge.

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Section: Introductionmentioning

confidence: 99%

Spatially-Resolved Study of the Electronic Transport and Resistive Switching in Polycrystalline Bismuth Ferrite

Abramov

Slautin

Pryakhina

et al. 2023

Sensors

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A DfT Strategy for Guaranteeing ReRAM’s Quality after Manufacturing

Copetti,

Fieback,

Gemmeke

et al. 2024

J Electron Test

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Memristive devices have become promising candidates to complement the CMOS technology, due to their CMOS manufacturing process compatibility, zero standby power consumption, high scalability, as well as their capability to implement high-density memories and new computing paradigms. Despite these advantages, memristive devices are susceptible to manufacturing defects that may cause faulty behaviors not observed in CMOS technology, significantly increasing the challenge of testing these novel devices after manufacturing. This work proposes an optimized Design-for-Testability (DfT) strategy based on the introduction of a DfT circuitry that measures the current consumption of Resistive Random Access Memory (ReRAM) cells to detect not only traditional but also unique faults. The new DfT circuitry was validated using a case study composed of a 3x3 word-based ReRAM with peripheral circuitry implemented based on a 130 nm Predictive Technology Model (PTM) library. The obtained results demonstrate the fault detection capability of the proposed strategy with respect to traditional and unique faults. In addition, this paper evaluates the impact related to the DfT circuitry’s introduced overheads as well as the impact of process variation on the resolution of the proposed DfT circuitry.

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