Electronic neural circuits with simulated annealing

Abstract

A very promising approach for implementing electronic neural nctworks is to design and fabricate special-purpose VLSI chips, bccause the software execution of simulated annealing on convcntional computer is very slow. In this paper, a hardware realization of simulated annealing is described using the analogy betwcen the tcmpcrature in the Boltzmann machine and the amplificr gain in the electronic neural circuits. Detailed requiremcnts for the annealing schedule are analyzed. Experimental results on the transfcr characteristics of 4-bit Hopfield neuralbascd analog-to-digital converter with the simulated annealing technique are prcscnted.

Simulated annealing of neural networks: The 'cooling' strategy reconsidered

“…Moreover, the long run times as-'Partial support for this work was provided by a GTE Graduate Fellowship and by NSF MIP-9110696, NSF Young Invest,igator Award MIP-9257982, ARO DAAK-70-92-K-0001, and ARO DAAL-03-92-G-0050. 2572 0-7803-1254-6/93$03.00 Q 1993 IEEE sociated with SA may soon be ameliorated by specialpurpose hardware [15] as well as improved strategic variants. Our main result is that the traditional "cooling" implementation of SA is not necessarily optimal and has been incorrectly motivated, both by the theoretical analysis of the algorithm and by the thermodynamic analogy implied by the term "annealing".…”