Electronic packaging gears up for 5G mobile race

Nishio, Toshihiko

doi:10.23919/icep.2017.7939388

Cited by 13 publications

(4 citation statements)

References 1 publication

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“…Recently electronic components appropriate for high speed and low latency networking in 5G and beyond 5G services are attracting attentions such as millimeter wave radar [1], antenna/camera modules [2,3] and multiple sensing devices [4,5]. Wide variety of semiconductor packages assembled in those components are also needed to be suitable for high frequency transmission.…”

Section: Introductionmentioning

confidence: 99%

Low Transmission Loss Cu Wirings with Smooth Seed Layer and High Adhesion against Prepregs

Hirano,

Toba,

Yamaguchi

2024

J. Photopol. Sci. Technol.

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Semiconductor packages for high performance devices with printed circuit boards having multi wiring layers such as FC-BGA have been attracting the attention in order to realize ultra-reliable and low latency communications in 5G networking. Cu wirings for the package are usually fabricated by semi-additive process (SAP) with desmear process and/or modified semi-additive process (MSAP) by using Cu foil with large surface roughness. Though a desmear process and Cu foil can obtain enough adhesion between dielectric and Cu seed layer by anchoring effect to secure reliabilities, the interface between dielectric and Cu seed layer should be smooth to achieve low attenuation of electric signals at high frequencies. Here, instead of that processes, we applied an UV modification for the surface of our developed prepreg in order to realize a smooth and high adhesive seed layer against the dielectric. We also conducted chemical modification for the surface of Cu foil to achieve low attenuation of transmission loss and high adhesion against prepreg. We successfully assembled Cu wirings with L/S = 6/6 μm on prepregs by SAP. High peel strength between Cu foil and prepreg was obtained due to chemical modification for the surface of Cu foil. The normalized transmission loss of Cu wiring assembled through MSAP was improved as compared to Cu foil with rough surface.

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Section: Introductionmentioning

confidence: 99%

Low Transmission Loss Cu Wirings with Smooth Seed Layer and High Adhesion against Prepregs

Hirano,

Toba,

Yamaguchi

2024

J. Photopol. Sci. Technol.

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“…The advent of 5G communications has been accelerating the development of radio frequency (RF) devices and components working at millimeter-wave frequencies. For many millimeter-wave applications, such as wireless communications, automotive radars, high-resolution imaging systems and gigabit backbone networks, demand for small-footprint, high-density, low-loss and low-cost system integration is continuously increasing [ 1 , 2 ]. Packaging substrates or interposers with through substrate via structures are widely used to demonstrate 2.5D/3D packaging schemes with the fabricated devices [ 3 , 4 , 5 , 6 ].…”

Section: Introductionmentioning

confidence: 99%

Fabrication of Substrate-Integrated Waveguide Using Micromachining of Photoetchable Glass Substrate for 5G Millimeter-Wave Applications

et al. 2023

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A millimeter-wave substrate-integrated waveguide (SIW) was firstly demonstrated using the micromachining of photoetchable glass (PEG) for 5G applications. A PEG substrate was used as a dielectric material of the SIW, and its photoetchable properties were used to fabricate through glass via (TGV) holes. Instead of the conventional metallic through glass via (TGV) array structures that are typically used for the SIW, two continuous empty TGV holes with metallized sidewalls connecting the top metal layer to the bottom ground plane were used as waveguide walls. The proposed TGV walls were fabricated by using optical exposure, heat development and anisotropic HF (hydrofluoric acid) etching of the PEG substrate, followed by a metal sputtering technique. The SIW was fed by microstrip lines connected to the waveguide through tapered microstrip-to-waveguide transitions. The top metal layer, including these feedlines and transitions, was fabricated by selective metal sputtering through a silicon shadow mask, which was prefabricated by a silicon deep-reactive ion-etching (DRIE) technique. The developed PEG-based process provides a relatively simple, wafer-level manufacturing method to fabricate the SIW in a low-cost glass dielectric substrate, without the formation of individual of TGV holes, complex time-consuming TGV filling processes and repeated photolithographic steps. The fabricated SIW had a dimension of 6 × 10 × 0.42 mm3 and showed an average insertion loss of 2.53 ± 0.55 dB in the Ka-band frequency range from 26.5 GHz to 40 GHz, with a return loss better than 13.86 dB. The proposed process could be used not only for SIW-based devices, but also for various millimeter-wave applications where a glass substrate with TGV structures is required.

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“…As 5G, AI and high-performance computing gradually make inroads into our world, there are escalating demand for semiconductor devices which deliver enhanced performance, lower latency, increased bandwidth and power efficiency, and the 2.5D/3D electronic packaging technologies played a key role to support these application (Nishio, 2017; He et al , 2022). The 2.5D/3D integration is an important packaging methodology to integrate multiple IC inside the same package.…”

Section: Introductionmentioning

confidence: 99%

Experimental study on the fracture behavior variation of the Au stud bump bonding with different high temperature storage times

Zhang

Wang

Sun

et al. 2023

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Purpose Au stud bump bonding technology is an effective means to realize heterogeneous integration of commercial chips in the 2.5D electronic packaging. The purpose of this paper is to study the long-term reliability of the Au stud bump treated by four different high temperature storage times (200°C for 0, 100, 200 and 300 h). Design/methodology/approach The bonding strength and the fracture behavior are investigated by chip shear test. The experiment is further studied by microstructural characterization approaches such as scanning electron microscope, energy dispersive spectrometer and so on. Findings It is recognized that there were mainly three typical fracture models during the chip shear test among all the Au stud bump samples treated by high temperature storage. For solder bump before aging, the fracture occurred at the interface between the Cu pad and the Au stud bump. As the aging time increased, the fracture mainly occurred inside the Au stud bump at 200°C for 100 and 200 h. When aging time increased to 300 h, it is found that the fracture transferred to the interface between the Au stud bump and the Al Pad. Originality/value In addition, the bonding strength also changed with the high temperature storage time increasing. The bonding strength does not change linearly with the high temperature storage time increasing but decreases first and then increases. The investigation shows that the formation of the intermetallic compounds because of the reaction between the Au and Al atoms plays a key role on the bonding strength and fracture behavior variation.

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Electronic packaging gears up for 5G mobile race

Cited by 13 publications

References 1 publication

Low Transmission Loss Cu Wirings with Smooth Seed Layer and High Adhesion against Prepregs

Low Transmission Loss Cu Wirings with Smooth Seed Layer and High Adhesion against Prepregs

Fabrication of Substrate-Integrated Waveguide Using Micromachining of Photoetchable Glass Substrate for 5G Millimeter-Wave Applications

Experimental study on the fracture behavior variation of the Au stud bump bonding with different high temperature storage times

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