Electronically tunable grounded/floating inductance simulators using Z-copy CFCCC

Singh, Alok Kumar; Kumar, Pragati; Senani, Raj

doi:10.3906/elk-1703-230

Cited by 27 publications

(19 citation statements)

References 42 publications

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“…A comparison of the proposed inductance simulators with other inductance simulators [31][32][33]44,[46][47][48][49][50][51][52][53][54][55][56][57][58][59][60], is shown in Table 3. It can be seen that most of the simple inductance simulators using one active building block only perform grounded-type simulations [31,48,[57][58][59][60].…”

Section: Comparisonmentioning

confidence: 99%

“…With two active and passive elements, the proposed floating inductance simulators can perform three functions, as a lossless inductor, series inductor-resistor, and parallel inductor-resistor. However, the inductance simulators realized in [31][32][33][46][47][48][49][50][51][52][53][54][55][56][57][58][59][60] cannot perform three functions with the same number of active and passive elements. The inductance simulators in [50,55] were realized from the active building block with a multiple output terminal.…”

Section: Comparisonmentioning

confidence: 99%

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Inductance Simulators and Their Application to the 4th Order Elliptic Lowpass Ladder Filter Using CMOS VD-DIBAs

et al. 2021

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This paper presents inductance simulators using the voltage differencing differential input buffered amplifier (VD-DIBA) as an active building block. Three types of inductance simulators, including floating lossless inductance, series inductance-resistance, and parallel inductance-resistance simulators, are proposed, in addition to their application to the 4th order elliptic lowpass ladder filter. The simple design procedures of these inductance simulators using a circuit block diagram are also given. The proposed inductance simulators employ two VD-DIBAs and two passive elements. The complementary metal oxide semiconductor (CMOS) VD-DIBA used in this design utilizes the multiple-input metal oxide semiconductor (MOS) transistor technique in order to achieve a compact and simple structure with a minimum count of transistors. Thanks to this technique, the VD-DIBA offers high performances compared to the other CMOS structures presented in the literature. The CMOS VD-DIBAs and their applications are designed and simulated in the Cadence environment using a 0.18 µm CMOS process from Taiwan semiconductor manufacturing company (TSMC). Using a supply voltage of ±0.9 V, the linear operation of VD-DIBA is obtained over a differential input range of −0.5 V to 0.5 V. The lowpass (LP) ladder filter realized with the proposed inductance simulators shows a dynamic range (DR) of 80 dB for a total harmonic distortion (THD) of 2% at 1 kHz and a 1.8 V peak-to-peak output. In addition, the experimental results of the floating inductance simulators and their applications are obtained by using VD-DIBA constructed from the available commercial components LM13700 and AD830. The simulation results are in agreement with the experimental ones, confirming the advantages of the inductance simulators and their application.

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Section: Comparisonmentioning

confidence: 99%

Section: Comparisonmentioning

confidence: 99%

Inductance Simulators and Their Application to the 4th Order Elliptic Lowpass Ladder Filter Using CMOS VD-DIBAs

et al. 2021

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“…However, the circuits of [34, 36] are SGIs. The circuits of [19–31, 33, 35, 37] include more than one ABB. The circuits of [22, 25, 31] need a matching condition.…”

Section: Introductionmentioning

confidence: 99%

“…The circuits of [19–31, 33, 35, 37] include more than one ABB. The circuits of [22, 25, 31] need a matching condition. Some SIs [32–38] contain an operational transconductance amplifier (OTA) in their internal structures; therefore, they have restrictions at high frequencies as mentioned in [39].…”

Section: Introductionmentioning

confidence: 99%

Single DDCC− based simulated floating inductors and their applications

Abaci

Yüce

2020

IET Circuits, Devices & Systems

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“…Each VD-DIBA requires three Operational Transconductance Amplifiers (OTA) and one current conveyor, in addition to a 2.2k resistor. The design in [3] used two Z-copy Current Follower Current Controlled Conveyors (ZC-CFCCCs). A negative floating inductance was presented in [4].…”

Section: Introductionmentioning

confidence: 99%

Realization of a Large Values Floating and Tunable Active Inductor

Al-Absi

2019

IEEE Access

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This paper presents a new design for active inductor (AI) realization in addition to capacitance and resistance multipliers. The design uses one current conveyor (CCII±) and one dual-output transconductance amplifier(DO-OTA) and a grounded capacitor. The functionality of the design is confirmed using experimental verification and simulation. Simulation results show that the realized inductance is tunable be tuned from few mH to 2H and more and the multiplication factor for the resistance multiplier is more than 2200 while the capacitance multiplication factor is around 500. A CMOS version of the AI is designed and simulated using Tanner Tspice in 0.18µm CMOS technology. The simulation results confirm the functionality of the design.INDEX TERMS Tunable active inductance, resistance multiplier, capacitance multiplier, integrated circuits.

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Electronically tunable grounded/floating inductance simulators using Z-copy CFCCC

Cited by 27 publications

References 42 publications

Inductance Simulators and Their Application to the 4th Order Elliptic Lowpass Ladder Filter Using CMOS VD-DIBAs

Inductance Simulators and Their Application to the 4th Order Elliptic Lowpass Ladder Filter Using CMOS VD-DIBAs

Single DDCC− based simulated floating inductors and their applications

Realization of a Large Values Floating and Tunable Active Inductor

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