Electrostatic discharge: mechanisms, protection techniques and effects on integrated circuit reliability

Avery, L.R.

doi:10.1002/qre.4680010210

Quality & Reliability Eng

1985

DOI: 10.1002/qre.4680010210

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Electrostatic discharge: mechanisms, protection techniques and effects on integrated circuit reliability

L.R. Avery

Abstract: Electrostatic discharge (ESD) was once considered a problem only for unprotected, insulated-gate field-effect transistors, but the ever shrinking geometries of all semiconductor devices have made them vulnerable to this phenomenon. ESD models and on-chip device protection techniques are reviewed, together with current evidence concerning latent defects and their effect on device reliability. A brief discussion on the importance of ESD controls in the assembly environment is also included, with an emphasis on r… Show more

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Cited by 6 publications

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“…The same year, the EOS (electric overstresses)/ESD Association formed. It was at the time estimated that over $5 billion worth of damage may be attributed to ESD [8]. Turner[9] also pointed out that static voltages of over 2kV may easily be generated.…”

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Electrostatic discharge

Meniconi

1997

International Journal of Quality &Amp; Reliability Management

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IntroductionThe invention of the metal-oxide-semiconductor(MOS) transistor introduced a new failure phenomenon to the semiconductor industry. Although the effects of electrostatic discharge (ESD) have been noted previously, their presence was strongly felt in this new technology. In 1978, Schreier pointed out that MOS Field Effect Transistors (MOSFETs) are most susceptible to ESD damage [1]. His findings showed that device breakdown may occur at voltages as low as 100V. Two years later, Hart et al. published another study relating to the electrical overstress damage to large scale integrated circuits (LSI) with reference to ESD [2].With the fast growing interest in ESD, a number of papers started to appear dealing with the associated failure modes. Unger, in particular, pointed out that ESD could result in short or open circuits in MOS structures [3]. Early models for testing MOS devices with respect to ESD have been introduced by Goel in 1981[4], Hart et al. [5], and in 1983 MIL-STD-883C appeared, standardizing test procedures for ESD events through Method 3015.7. However, even before this standard was published, some research pointed out that the models used may not necessarily be representative of a working environment [6]. Since then, MIL-STD-883D (1991) has appeared with a revised version of Method 3015.7, Electrostatic Discharge Susceptibility Classification.Emphasis was put on trying to determine the static charge build-up which might occur for various materials and the associated human interaction. Some typical figures were published by Moss in 1982 [7]. The same year, the EOS (electric overstresses)/ESD Association formed. It was at the time estimated that over $5 billion worth of damage may be attributed to ESD [8]. Turner[9] also pointed out that static voltages of over 2kV may easily be generated. As a result, problems at the wafer level may occur during the actual manufacture of integrated circuits.

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Electrostatic discharge

Meniconi

1997

International Journal of Quality &Amp; Reliability Management

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This paper analyzes the operation mechanism of integrated circuit electrostatic discharge (ESD) protection device

2021

J. Phys.: Conf. Ser.

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Electrostatic discharge, as a common natural phenomenon in daily life, seriously threatens the reliability of integrated circuit products. In order to ensure the yield of the chip, the protection circuit on the chip has become an essential and important module in the circuit design. With the continuous development of integrated circuit technology, chips are developing towards the direction of smaller area, faster speed and higher level of integration, while traditional devices such as simple diodes, tubes and SCR on integrated circuit can no longer complete the protection task of chips under advanced technology. Through the research and discussion of this paper, the methods and strategies of electrostatic discharge protection design of integrated circuits and how to choose the best electrostatic discharge protection scheme for different integrated circuits are basically mastered.

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A method for determining electric parameters of multibody configurations

Kucerovsky

Kucerovsky²,

Greason³

1992

IEEE Trans. on Ind. Applicat.

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Electrostatic discharge: mechanisms, protection techniques and effects on integrated circuit reliability

Cited by 6 publications

References 5 publications

Electrostatic discharge

Electrostatic discharge

This paper analyzes the operation mechanism of integrated circuit electrostatic discharge (ESD) protection device

A method for determining electric parameters of multibody configurations

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