Electrostatically Doped Planar Field-Effect Transistor for High Temperature Applications

Krauss, Tillmann; Wessely, Frank; Schwalke, Udo

doi:10.1149/2.0021507jss

Cited by 14 publications

(8 citation statements)

References 24 publications

(41 reference statements)

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“…[ 58 ] Consequently, the proposed Al‐Si NW RFET, revealed an on‐current level symmetry factor of ≈5 between n‐ and p‐type operation. At a first glance the difference seems large but it is substantially lower compared to prior‐art Si based RFETs with state‐of‐the‐art nickel silicide contacts, [ 57,59–61 ] reaching asymmetry ratios 2–5 times larger than with the here proposed Al‐Si system. The relatively high symmetry was achieved without any additional efforts, as that is, precise strain engineering [ 62 ] or asymmetric biasing of program voltages.…”

Section: Resultsmentioning

confidence: 72%

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

Böckle

Sistani

Bažíková

et al. 2022

Adv Elect Materials

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Modern society is highly depending and relying on electronic computing devices, as for example, employed in efficient servers, personal computers, and mobiles, and currently being explored toward the realization of emerging computing paradigms, such as "artificial intelligence" and the "Internet of Things". [1] A key enabler for these paradigms is the complementary metal-oxide-semiconductor (CMOS) technology, which utilizes the concept of complementary n-and p-type field-effect transistors (FET) to construct Boolean logic gates. Importantly, in CMOS technology the logic functions are fixed by the physical layout of interconnects and the definition of doped regions and thus do not allow for a flexible alteration of the circuits after production. The continuous shrinking of feature sizes of these Si metal-oxide-semiconductor field-effect transistors (MOSFETs) has been providing performance enhancement and higher power efficiency throughout the last decades. However, classical scalability is limited [2] and the static nature of the MOSFET primitives was not developed to provide runtimeadaptability as required for new circuit paradigms. A concept to overcome the static nature in CMOS technology and reduce overall circuit area and power consumption are reconfigurable FETs (RFETs), [3][4][5] encompassing a broad family of devices that enable a reconfiguration of the dominant carrier type based on either Schottky-barrier field-effect transistors (SBFET), [4,[6][7][8][9] or steep slope band-to-band tunneling transistors (TFET), [10][11][12][13] capable of dynamically altering the device operation between n-and p-type. This device concept thus gives rise to a paradigm change where devices, circuits, and even systems are actively and dynamically reconfigured after manufacturing or, as particularly noteworthy, even during run-time, enabling an adaption to the needed logic function of a circuit. Importantly, this "fine-grain" approach is fundamentally different to the already available "coarse-grain" approach followed in field programmable gate arrays (FPGAs) [14] based on signal routing to predefined logic blocks, resulting in high latency in data Metal-semiconductor heterostructures providing geometrically reproducible and abrupt Schottky nanojunctions are highly anticipated for the realization of emerging electronic technologies. This specifically holds for reconfigurable field-effect transistors, capable of dynamically altering the operation mode between n-or p-type even during run-time. Targeting the enhancement of fabrication reproducibility and electrical balancing between operation modes, here a nanoscale Al-Si-Al nanowire heterostructure with single elementary, monocrystalline Al leads and sharp Schottky junctions is implemented. Utilizing a three top-gate architecture, reconfiguration on transistor level is enabled. Having devised symmetric on-currents as well as threshold voltages for n-and p-type operation as a necessary requirement to exploit complementary reconfigurable circuits, selected implementations of log...

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Section: Resultsmentioning

confidence: 72%

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

Böckle

Sistani

Bažíková

et al. 2022

Adv Elect Materials

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“…MIGFETs are a relatively novel class of emerging devices that are based on gated low-dimensional semiconductor Schottky junctions. They are extensions of the more-well known polarity-controllable or reconfigurable field effect transistors (RFETs) and thus are able to offer multiple operation states [10]- [13]. Exploiting the plurality of gate electrodes REFTs merge unipolar p-and n-type conduction into a single device.…”

Section: Schottky Barrier Based Transistors With Multiple Indepementioning

confidence: 99%

Inherent Charge-Sharing-Free Dynamic Logic Gates Employing Transistors With Multiple Independent Inputs

Trommer

Simon

Slesazeck

et al. 2020

IEEE J. Electron Devices Soc.

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Charge sharing poses a fundamental problem in the design of dynamic logic gates, which is nearly as old as digital circuit design itself. Although, many solutions are known, up to now most of them add additional complexity to a given circuit and require careful optimization of device sizes. Here we propose a simple CMOS-technology compatible transistor level solution to the charge sharing problem, employing a new class of field effect transistors with multiple independent gates (MIGFETs). Based on mixed-mode simulations in a coordinated device-circuit co-design framework, we show that their underlying device physics provides an inherent suppression of the charge sharing effect. Circuit layouts and design examples are discussed, which elucidate the fundamental differences in circuit topology to classical CMOS designs. For example it is shown that dynamic gates from MIGFET scale much better with stack height of long serial networks, leading to an increased circuit performance, while also providing higher signal stability.

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“…Among the innovative devices capable of enabling novel scaling paradigms, reconfigurable field-effect transistors (RFETs) [5] deserve to be mentioned thanks to their inherent polarity control features [6] that can be applied in the fields of energy efficiency devices [7] and multifunctional circuit design. [8] While both pertinence and benefits of this technology were already discussed in several works for either high [9,10] and low [11] temperature applications in the past, newer and more complex concepts of RFET devices, featuring for example multiple independent gates, [12,13] have been developed and must be characterized in terms of their temperature-dependent behavior. Beyond developing a better understanding of the operation of such devices in order to extend to different environmental conditions their applicability in fields where it was already suggested or proven, like hardware security, [14][15][16] it is important to point out how RFETs can successfully overcome many limitations typical for standard devices such as MOSFETs, thanks to their intrinsically distinct working principle.…”

Section: Introductionmentioning

confidence: 99%

Insights into the Temperature‐Dependent Switching Behavior of Three‐Gated Reconfigurable Field‐Effect Transistors

Galderisi

Beyer

Mikolajick

et al. 2023

Physica Status Solidi (a)

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Three‐gated reconfigurable field‐effect transistors are innovative nanoelectronic devices that are rapidly and increasingly attracting substantial interest in several fields of application thanks to their inherent n/p‐type reconfiguration capabilities. For this reason, it is of significant importance to acquire a deeper knowledge about the temperature ranges in which such devices can be operated and, at the same time, gather a better understanding of the physical mechanisms that are involved in their operation. To achieve this aim, in‐depth observations about the functioning of such devices in an ultrawide temperature range, spanning from 80 to 475 K, are performed and are presented for their ambipolar and low V normalT operation modes. In view of the data exhibited herein, it is possible to assess the performances of three‐gated reconfigurable field‐effect transistors within a considerable temperature span and finally provide significant insights on the temperature‐dependent physical mechanisms regulating their functionality.

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Electrostatically Doped Planar Field-Effect Transistor for High Temperature Applications

Cited by 14 publications

References 24 publications

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

Inherent Charge-Sharing-Free Dynamic Logic Gates Employing Transistors With Multiple Independent Inputs

Insights into the Temperature‐Dependent Switching Behavior of Three‐Gated Reconfigurable Field‐Effect Transistors

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