Electrothermal stability of uniform arrays of one‐port elements

Storti-Gajani, G.; Premoli, A.; Brambilla, A.

doi:10.1002/cta.496

Cited by 3 publications

(10 citation statements)

References 8 publications

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“…Since 0 (cos( / p)−4) 2 −9 16 with −1 cos( / p) 1, and we must have | | 1 for nondivergence, the stability condition turns out to be 4 and the same formula for *T /*t are applied to (2), we have…”

Section: Simple Explicit Methodsmentioning

confidence: 97%

“…Considering now the possibility of finding difference schemes that represent the differential equation more accurately, it is natural to use the CD approximation with TR = O[( x) 4 ] instead of the one with TR = O[( x) 2 ]. Applying the same formula for *T /*t to (2), we have…”

Section: Simple Explicit Methodsmentioning

confidence: 99%

“…Therefore, this implicit finite difference method is unconditionally stable with the best accuracy 4 ] which is also a 1-4 scheme.…”

Section: Simple Explicit Methodsmentioning

confidence: 99%

“…It should be noted that (4) gives the values of T at time (n +1)( t) immediately in terms of those at time n( t), and thus is called the explicit method. To find the stability condition of this method, we can substitute a trial solution…”

Section: Simple Explicit Methodsmentioning

confidence: 99%

“…Thermal effects on the reliability and performance of VLSI design have attracted increasing attention due to the rapid increase of power and package densities in recent years. Thermal effects are of great importance to a variety of problems including circuit design [1,2], thermodynamical analysis [3], electrothermal stability [4] and thermal noise analysis [5,6], etc. More and more efforts have been put into the development of numerical methods for the solution of heat conduction problems.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Finite difference schemes for heat conduction analysis in integrated circuit design and manufacturing

Shen¹,

Wong²,

Lam³

et al. 2011

Circuit Theory & Apps

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SUMMARYThe importance of thermal effects on the reliability and performance of VLSI circuits has grown in recent years. The heat conduction problem is commonly described as a second-order partial differential equation (PDE), and several numerical methods, including simple explicit, simple implicit and Crank-Nicolson methods, all having at most second-order spatial accuracy, have been applied to solve the problem. This paper reviews these methods and further proposes a fourth-order spatial-accurate finite difference scheme to better approximate the PDE solution. Moreover, we devise a fourth-order accurate approximation of the convection boundary condition, and apply it to the proposed finite difference scheme. We use a block cyclic reduction and a recently developed numerically stable algorithm for inversion of block-tridiagonal and banded matrices to solve the PDE-based system efficiently. Despite their higher computation complexity than direct computation in a sequential processor, we make it possible for the very first time to employ a divide-and-conquer algorithm, viable for parallel computation, in heat conduction analysis. Experimental results prove such possibility, suggesting that applying divide-and-conquer algorithms, higher-order finite difference schemes can achieve better simulation accuracy with even faster speed and less memory requirement than conventional methods.

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Section: Simple Explicit Methodsmentioning

confidence: 97%

Section: Simple Explicit Methodsmentioning

confidence: 99%

“…Therefore, this implicit finite difference method is unconditionally stable with the best accuracy 4 ] which is also a 1-4 scheme.…”

Section: Simple Explicit Methodsmentioning

confidence: 99%

Section: Simple Explicit Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Finite difference schemes for heat conduction analysis in integrated circuit design and manufacturing

Shen¹,

Wong²,

Lam³

et al. 2011

Circuit Theory & Apps

View full text Add to dashboard Cite

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Cost reduction in bottom‐up hierarchical‐based VLSI floorplanning designs

Hoo

Kanesan

Ramiah

2013

Circuit Theory & Apps

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From the industrial perspective, floorplanning is a crucial step in the VLSI physical design process as its efficiency determines the quality and the time-to-market of the product. A new perturbation method, called Cull-and-Aggregate Bottom-up Floorplanner (CABF), which consists of culling and aggregating stages, is developed to perform variable-order automated floorplanning for VLSI. CABF will generate VLSI floorplan layout by calculating the modules' dimensions' differences (hard module floorplanning problems) and the modules' areas' differences (soft module floorplanning problems). Through mathematical derivation, the hard modules floorplanning area minimization cost function (two-dimensional) during culling stage is proven that a dimensional reduction can be carried out to be the difference-based cost function (one-dimensional) which simplifies the computation. During the culling stage, CABF employs linear ordering method to select and determine the order of modules where this linear runtime complexity property allows CABF to cull the modules faster. The aggregating stage of CABF will reduce the subsequent search space of this floorplanner, and the variable order aggregation enables CABF to search for the best near-optimal solution. Based on Gigascale Systems Research Center and Microelectronics Center of North Carolina circuit benchmarks, CABF gives better optimal solutions and faster runtimes for floorplanning problems involving 9 to 600 modules. This has established that CABF is performing well in respect of reliability and scalability. Besides, CABF shows its potential to be implemented in VLSI physical design as the runtime of CABF is faster with a near-optimal outcome as compared to the other existing algorithms.

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Modeling and estimating yield and efficiency of photovoltaic solar parks

Bizzarri

Brambilla

Gruosso

et al. 2013

2013 IEEE International Conference on Industrial Technology (ICIT)

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Abstract—Subsidy reduction and the increased importance of\ud photovoltaic energy generation have triggered the need to develop\ud accurate approaches to measure, estimate and possibly forecast\ud energy production with the goal of enabling early detection and\ud diagnosis of parametric faults before they become catastrophic\ud and lead to partial or full shut down of the plant. Moreover the\ud ability of accurately predicting the energy output of a photovoltaic\ud plant is becoming increasingly important to operate efficiently\ud the existing power grid infrastructure that has difficulties with\ud intermittent, unpredictable power sources. In this paper a new\ud model of photovoltaic solar parks designed to estimate efficiency,\ud predict energy production and enable early fault detection is\ud presented. The proposed model is based on an equivalent electrothermal\ud model of the PhotoVoltaic (PV) cell, which takes as input\ud the irradiance, ambient temperature and wind speed measured by\ud existing sensors and data-logging equipment used in most solar\ud PV parks. The proposed model is demonstrated to accurately\ud predict the performance of real-life MW scale plants. By directly\ud comparing predicted vs. actual energy production, it also allows\ud easy and early identification and diagnose of malfunctions and\ud efficiency drops of PV systems

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Electrothermal stability of uniform arrays of one‐port elements

Cited by 3 publications

References 8 publications

Finite difference schemes for heat conduction analysis in integrated circuit design and manufacturing

Finite difference schemes for heat conduction analysis in integrated circuit design and manufacturing

Cost reduction in bottom‐up hierarchical‐based VLSI floorplanning designs

Modeling and estimating yield and efficiency of photovoltaic solar parks

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