Elimination of Photoleakage Current in Poly-Si TFTs Using a Metal-Shielding Structure

Lu, Hau Yan; Chang, Ting Chang; Liu, Po–Tsun; Li, Hung Wei; Hu, Chia-Lin; Lin, Kun Chih; Tai, Ya‐Hsiang; Chi, Sien

doi:10.1149/1.2859388

Electrochem. Solid-State Lett.

2008

DOI: 10.1149/1.2859388

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Elimination of Photoleakage Current in Poly-Si TFTs Using a Metal-Shielding Structure

Hau Yan Lu¹,

Ting Chang Chang

Po–Tsun Liu

et al.

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Cited by 3 publications

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“…Low temperature polycrystalline silicon thin film transistors ͑LTPS TFTs͒ have been widely investigated for flat panel applications, such as for active matrix liquid crystal displays and active matrix organic light emitting diode displays 1,2 because the electron mobility of LTPS TFTs is higher than that of conventional amorphous silicon ͑a-Si͒ TFTs. Because the maximum process temperature is lower than 600°C, LPTS TFTs can be fabricated on cheap glass.…”

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Analysis of Anomalous Capacitance Induced by TAGIDL in p-Channel LTPS TFTs

Lin¹,

Chen²,

Chang

et al. 2010

J. Electrochem. Soc.

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In this work, a mechanism of anomalous capacitance in p-channel low temperature polycrystalline silicon thin film transistors ͑LTPS TFTs͒ was investigated. In general, the effective capacitance of the LTPS TFTs was only dependent with the overlap area between the gate and source/drain under the off-state. However, the experimental results reveal that the off-state capacitance was increased with decreasing measurement frequency and/or with increasing measurement temperature. By fitting the curve of the drain current vs electric field under off-state region, it was verified that the trap-assisted gate-induced drain leakage ͑TAGIDL͒ consists of the Pool-Frenkel emission and thermal field emission. In addition, the charge density calculated from the C gsd -V g measurement also has the same dependence with electric field. This result demonstrates that the anomalous capacitance is mainly due to the TAGIDL. To suppress the anomalous capacitance, a band-to-band hot electron stress was utilized to reduce the vertical electric field between the gate and the drain. The electric field simulation was also performed by TCAD software.Low temperature polycrystalline silicon thin film transistors ͑LTPS TFTs͒ have been widely investigated for flat panel applications, such as for active matrix liquid crystal displays and active matrix organic light emitting diode displays 1,2 because the electron mobility of LTPS TFTs is higher than that of conventional amorphous silicon ͑a-Si͒ TFTs. Because the maximum process temperature is lower than 600°C, LPTS TFTs can be fabricated on cheap glass. This feature allows the fabrication of a pixel array and peripheral circuits on the same glass substrate. Consequently, this technology becomes more suitable to integrate both the pixel array and peripheral circuits on system-on-panel display, 3,4 and the LTPS TFTs are designed using complementary metal oxide semiconductor inverters. However, in previous papers, the results indicated that large leakage current is an important problem in p-channel LTPS TFTs. 5 The dominant mechanisms of the leakage current in LTPS TFTs have been widely studied, 6,7 and most of that have been focused on the analyses of current-voltage ͑I-V͒ transfer characteristics. However, it is rather difficult to investigate the relationship between capacitance-voltage ͑C-V͒ transfer characteristics and leakage current. Besides, most studies of C-V transfer characteristics in LTPS TFTs are mainly reported to monitor the electrical stress induced degradation in the transition region. 8,9 However, the leakage current dependent C-V in the off-state region was not investigated carefully. The purpose of this work is to investigate the relationship between the leakage current and C-V transfer characteristics in LTPS TFTs. The trap-assisted gate-induced drain leakage ͑TAGIDL͒ induced capacitance was observed and verified. In addition, we used an electrical stress to suppress the TAGIDL-induced capacitance and used the simulator TCAD to demonstrate the mechanism. ExperimentalIn this work,...

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Analysis of Anomalous Capacitance Induced by TAGIDL in p-Channel LTPS TFTs

Lin¹,

Chen²,

Chang

et al. 2010

J. Electrochem. Soc.

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A temperature study of photosensitivity in SLS polycrystalline silicon TFTs

Michalas

Syntychaki

Koutsoureli

et al. 2012

Microelectronics Reliability

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Analyzing the effects of ambient dependence for InGaZnO TFTs under illuminated bias stress

Chen

Chang

Hsieh

et al. 2013

Surface and Coatings Technology

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Elimination of Photoleakage Current in Poly-Si TFTs Using a Metal-Shielding Structure

Cited by 3 publications

References 6 publications

Analysis of Anomalous Capacitance Induced by TAGIDL in p-Channel LTPS TFTs

Analysis of Anomalous Capacitance Induced by TAGIDL in p-Channel LTPS TFTs

A temperature study of photosensitivity in SLS polycrystalline silicon TFTs

Analyzing the effects of ambient dependence for InGaZnO TFTs under illuminated bias stress

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