ELSE: A New Symbolic State Generator for Timed Automata

Zennou, Sarah; Yguel, Manuel; Niebert, Peter

doi:10.1007/978-3-540-40903-8_22

Cited by 4 publications

(4 citation statements)

References 9 publications

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“…This work which has been done in parallel with the development of the first verification tools for timed automata, uses another terminology and has not proliferated to the timed automaton culture. Two more recent efforts, which are more ambitious with respect to full-fledged partial-order reductions, are those of Zhao [Z02] and of Niebert et al [ZYN03,LNZ05]. Both works use additional clocks in their algorithms and use zones over the extended clock space ("event zones" in the terminology of [ZYN03,LNZ05], "local successors" in the terminology of [Z02]) that represent all configurations reached by interleavings of independent actions.…”

Section: Related Work and Discussionmentioning

confidence: 99%

On Interleaving in Timed Automata

Salah

Bozga

Maler

2006

CONCUR 2006 – Concurrency Theory

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Abstract. We propose a remedy to that part of the state-explosion problem for timed automata which is due to interleaving of actions. We prove the following quite surprising result: the union of all zones reached by different interleavings of the same set of transitions is convex. Consequently we can improve the standard reachability computation for timed automata by merging such zones whenever they are encountered. Since passage of time distributes over union, we can continue the successor computation from the new zone and eliminate completely the explosion due to interleaving.

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Section: Related Work and Discussionmentioning

confidence: 99%

On Interleaving in Timed Automata

Salah

Bozga

Maler

2006

CONCUR 2006 – Concurrency Theory

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“…The closest work, at least in spirit, to ours is that of Niebert et al [ZYN03,LNZ05] who are more ambitious with respect to full-fledged partial-order reductions and use "event zones" rather than the standard "clock zones" used in the present paper. Event zones contain sufficient additional dimensions to represent dependency such that all representatives of a trace lead to the same event zone.…”

Section: Related Work and Discussionmentioning

confidence: 96%

CONCUR 2006 – Concurrency Theory

2006

Lecture Notes in Computer Science

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We propose a remedy to that part of the state-explosion problem for timed automata which is due to interleaving of actions. We prove the following quite surprising result: the union of all zones reached by different interleavings of the same set of transitions is convex. Consequently we can improve the standard reachability computation for timed automata by merging such zones whenever they are encountered. Since passage of time distributes over union, we can continue the successor computation from the new zone and eliminate completely the explosion due to interleaving.

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“…Region graph [Alur et al 1990] methods must construct a region graph of exponential size in the number and magnitude of the clocks. To tackle this problem, zone-based approaches like difference bound matrices [Dill 1990], region encoding diagrams [Wang et al 2005], clock difference diagrams [Larsen et al 1999], and difference decision diagrams [Møller et al 1999], along with symbolic methods ] and tools like Kronos [Daws et al 1995a], Rabbit [Beyer et al 2003], RED [Wang et al 2005], ELSE [Zennou et al 2003], Romeo [Gardey et al 2005], and UPPAAL [Larsen et al 1997] have been developed. Recently, symbolic methods exploiting partial order reduction [Lugiez et al 2005] have been proposed.…”

Section: :4mentioning

confidence: 99%

Scenario-based timing verification of multiprocessor embedded applications

Das

Chakrabarti

Kumar

2009

ACM Trans. Des. Autom. Electron. Syst.

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This work presents a static timing-analysis method for verification of scenario-based real-time properties, on graphical task-level models of embedded applications. Scenario-based properties specify timing constraints which must be honored for specific control-flow behaviors and task execution orderings. Static checking of scenario-based properties currently requires computationally expensive model checking methods. Hence the proposed graph-based static timing-analysis algorithm improves upon the state-of-the-art. This is manifested in a significant performance advantage over timed model checking (up to 1000X in several cases), which suffers from state space explosion. The proposed algorithm also employs compositional reasoning and abstraction refinement for handling large problems. We also illustrate methods for using scenario-based timing analysis, which can act as alternatives to traditional timed model checking for verification of timed systems like FDDI and Fischer protocols. We implement this timing verification algorithm as a tool called SymTime and present experimental results for SymTime comparing it with SPIN, UPPAAL, and a TCTL model checker for Time Petri Nets, called Romeo.

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ELSE: A New Symbolic State Generator for Timed Automata

Cited by 4 publications

References 9 publications

On Interleaving in Timed Automata

On Interleaving in Timed Automata

CONCUR 2006 – Concurrency Theory

Scenario-based timing verification of multiprocessor embedded applications

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