Embedded Flash Memory

Hidaka, Hideto

doi:10.1007/978-0-387-88497-4_6

Cited by 2 publications

(4 citation statements)

References 24 publications

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“…The charge trapping is realized via a nitride-based storage layer. Such devices are routinely fabricated in mature Si-fabrication technology with excellent reproducibility, durability and large-scale integration [24]. They are the backbone of today's silicon-based non-volatile memory technology [12,13].…”

Section: Methodsmentioning

confidence: 99%

“…To close the gap between the novel computing concepts and their hardware implementation in the near future, appropriate devices are required which exhibit sufficient yield, variability, predictability, energy efficiency, and compatibility to the prevailing silicon technology. Industrial grade field effect transistors with a charge storage layer at the gate are well established in silicon technology and highly attractive for neuromorphic systems [13][14][15]. In this respect, MemFlash cells provide an interesting opportunity for neural computing [16][17][18].…”

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confidence: 99%

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Memristive device based on a depletion-type SONOS field effect transistor

Himmel

Ziegler

Mähne

et al. 2017

Semicond. Sci. Technol.

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State-of-the-art SONOS (silicon-oxide-nitride-oxide-polysilicon) field effect transistors were operated in a memristive switching mode. The circuit design is a variation of the MemFlash concept and the particular properties of depletion type SONOS-transistors were taken into account. The transistor was externally wired with a resistively shunted pn-diode. Experimental current-voltage curves show analog bipolar switching characteristics within a bias voltage range of ±10 V, exhibiting a pronounced asymmetric hysteresis loop. The experimental data are confirmed by SPICE simulations. The underlying memristive mechanism is purely electronic, which eliminates an initial forming step of the as-fabricated cells. This fact, together with reasonable design flexibility, in particular to adjust the maximum R ON /R OFF ratio, makes these cells attractive for neuromorphic applications. The relative large set and reset voltage around ±10 V might be decreased by using thinner gate-oxides. The all-electric operation principle, in combination with an established silicon manufacturing process of SONOS devices at the Semiconductor Foundry X-FAB, promise reliable operation, low parameter spread and high integration density.

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Section: Methodsmentioning

confidence: 99%

mentioning

confidence: 99%

Memristive device based on a depletion-type SONOS field effect transistor

Himmel

Ziegler

Mähne

et al. 2017

Semicond. Sci. Technol.

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“…Moreover, because the MemFlash-cell is based simply on a modified wiring scheme, all current approaches such as charge trapping (e.g., silicon-oxide-nitride-oxide-silicon (SONOS)), nanocrystal floating gates, three-dimensional circuits, a sub-threshold operation or FinFETs designs can be implemented. 24,[31][32][33][34] Nonetheless, despite the problem of power consumption, MemFlash-cells could be used to demonstrate the proof of principles of two terminal devices in circuit architectures. Especially, for this purpose and in comparison to state-ofthe-art memristive devices, a Si-based fabrication technology, including small parameter spreads and a high yield, offers an interesting alternative for currently available memristive devices based on partly ionic mechanisms.…”

mentioning

confidence: 99%

“…However, in such common non-volatile Flash-type memories write, erase, and read cycles are timely distinguishable and for each cycle a particular pulse sequence is applied. [22][23][24] The common EEPROM-cell is a three-terminal or four-terminal device, which prevents at first glance a memristive operation mode. Therefore, advanced cell layouts are required if memristive I-V characteristics should be established.…”

mentioning

confidence: 99%

Memristive operation mode of floating gate transistors: A two-terminal MemFlash-cell

Ziegler¹,

Oberländer²,

Schroeder³

et al. 2012

Applied Physics Letters

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A memristive operation mode of a single floating gate transistor is presented. The device resistance varied accordingly to the charge flow through the device. Hysteretic current-voltages including a resistance storage capability were observed. These experimental findings are theoretically supported by a capacitive based model. The presented two-terminal MemFlash-cell can be considered as a potential substitute for any memristive device (especially for reconfigurable logic, cross-bar arrays, and neuromorphic circuits) and is basically compatible with current Si-fabrication technology. The obvious trade-off between a memristive device based on a state-of-the-art silicon process technology and power consumption concerns will be discussed.

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Embedded Flash Memory

Cited by 2 publications

References 24 publications

Memristive device based on a depletion-type SONOS field effect transistor

Memristive device based on a depletion-type SONOS field effect transistor

Memristive operation mode of floating gate transistors: A two-terminal MemFlash-cell

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