The Random Telegraph Noise (RTN) in an advanced Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is considered to be triggered by just one electron or one hole, and its importance is recognised upon the aggressive scaling. However, the detailed nature of the charge trap remains to be investigated due to the difficulty to find out the exact device, which shows the RTN feature over statistical variations. Here, we show the RTN can be observed from virtually all devices at low temperatures, and provide a methodology to enable a systematic way to identify the bias conditions to observe the RTN. We found that the RTN was observed at the verge of the Coulomb blockade in the stability diagram of a parasitic Single-Hole-Transistor (SHT), and we have successfully identified the locations of the charge traps by measuring the bias dependence of the RTN.Charge traps in advanced Silicon (Si) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) have been used for many important applications 1 in semiconductor industries. For example, a Metal-Oxide-NitrideOxide-Semiconductor (MONOS) memory device 2,3 has an advantage on a long retention time at high temperatures, which is suitable for an integrated microprocessor in a vehicle. An interface trap is also useful to extend the current plateau in a single electron pump 4 at low temperatures, which is a promising candidate for a redefinition of ampere to establish a new current standard based on an elementary charge in quantum metrology. On the other hand, charge traps also affect reliability problems 5,6 , such as Random Telegraph Noise (RTN) 7-11 and Negative Bias Temperature Instabilities (NBTI) 12 , causing failures of Static Random Access Memory (SRAM) cells and degradations of long term performance 13,14 . In particular, the impact of RTN is getting more important with the scaling [15][16][17] , since the variations [18][19][20] in an atomic level can affect the drain current in sub-20 nm MOSFETs. RTN is coming from the carrier trapping and de-trapping processes through charge traps at the gate insulator/Si interface, which are intrinsic quantum processes 21,22 . Quantum effects are not negligible in advanced MOSFETs, since the gate insulator is as thin as 1 nm 23 , and the direct tunnelling currents from the channel into the traps are expected due to enhanced coupling 24 . Previously, the most of the works on RTN were based on measurements at room temperatures [7][8][9][10][11]25,26 . At room temperatures, the thermal fluctuation significantly affect the carrier dynamics 27 , and it was difficult to identify the quantum energy levels of charge traps. By measuring the MOSFETs at low temperatures, it is easier to observe various quantum effects 28 . In our previous study, we have found current peaks at low temperatures in advanced Si MOSFETs 29 , but the mechanism of the peaks was not elucidated. In this paper, we characterised the peaks in time domain, and found that the current peaks are related to RTN. The bias conditions to observe the current peaks have b...