Encrypt Flip-Flop: A Novel Logic Encryption Technique For Sequential Circuits

Abstract

Logic Encryption is one of the most popular hardware security techniques which can prevent IP piracy and illegal IC overproduction. It introduces obfuscation by inserting some extra hardware into a design to hide its functionality from unauthorized users. Correct functionality of an encrypted design depends upon the application of correct keys, shared only with the authorized users. In the recent past, extensive efforts have been devoted in extracting the secret key of an encrypted design. At the same time, several countermeasures have also been proposed by the research community to thwart different state-of-the-art attacks on logic encryption. However, most of the proposed countermeasures fail to prevent the powerful SAT attack. Although a few researchers have proposed different solutions to withstand SAT attack, those solutions suffer from several drawbacks such as high design overheads, low output corruptibility, and vulnerability against removal attack. Almost all the known logic encryption strategies are vulnerable to scan based attack. In this paper, we propose a novel encryption technique called Encrypt Flip-Flop, which encrypts the outputs of selected flip-flops by inserting multiplexers (MUX). The proposed strategy can thwart all the known attacks including SAT and scan based attacks. The scheme has low design overhead and implementation complexity. Experimental results on several ISCAS'89 and ITC'99 benchmarks show that our proposed method can produce reasonable output corruption for wrong keys.

UNTANGLE: Unlocking Routing and Logic Obfuscation Using Graph Neural Networks-based Link Prediction

“…However, these techniques are susceptible to various structural and functional attacks [18,21,32,33]. 2) Scan locking [34,35] techniques obfuscate the scan data, limiting the controllability and observability of internal nets. Nevertheless, modeling attacks [16,36] have been successful in circumventing scan locking techniques.…”

DynUnlock: Unlocking Scan Chains Obfuscated using Dynamic Keys

“…Dynamic Encrypt Flip-Flop (EFF-Dyn) [13] combines scan locking approach from [10] and a PRNG, to introduce dynamicity in the defense. During functional mode or the capture operation in test mode (scan enable (SE) signal is low), the secret scan locking key that is stored in the Tamper-Proof Memory (TPM) controls the key gates.…”

“…Recently, XOR/MUX based scan obfuscation techniques have been proposed [10], [11], [12], [13] to obfuscate the scan data via XOR/MUX operations based on a secret key through key gates inserted between the scan flops. In [10], a static key is used to obfuscate the scan chain content during scan in and out of patterns, effectively hindering unauthorized scan access. However, this defense was also recently broken by ScanSAT attack [14].…”

SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption

“…Accordingly, the adversary can target sequential circuits using the SAT attack. Hence, few recent studies investigated the possibility of restricting the scan chain using scan chain locking/blocking [9]- [11]. Also, considering that the access to the scan chain is restricted/locked, several studies investigated the possibility of applying the logic locking to the whole sequential circuits [14], [15], particularly FSMs [14]- [19].…”

“…In case of FSM locking [16]- [18], [21], a new attack, without oracle access, denoted as 2-stage attacks on FSM (2-stage) was formulated [14], [19]. Also, in case of sequential (datapath) or scan chain locking [9]- [11], [14], [15], a new breed of SAT-based attacks, referred as unrolling-based SAT attack (UB-SAT) as well as SAT attacks integrated with bounded-model-checking (BMC) was formulated [22]- [24], challenging the validity of these solutions.…”