Energy-efficient cluster computing with FAWN

Vasudevan, Vijay; Andersen, David G.; Kaminsky, Michael; Tan, Lawrence; Franklin, Jason; Moraru, Iulian

doi:10.1145/1791314.1791347

Cited by 43 publications

(31 citation statements)

References 9 publications

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“…FAWN was a proposal to use Intel Atom processors in clusters [38]. The cluster was built and tested with a range of workloads, but evaluation did not include a suite of true HPC workloads.…”

Section: Related Workmentioning

confidence: 99%

The Mont-Blanc Prototype: An Alternative Approach for HPC Systems

Rajovic¹,

Rico

Mantovani

et al. 2016

SC16: International Conference for High Performance Computing, Networking, Storage and Analysis

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Abstract-High-performance computing (HPC) is recognized as one of the pillars for further advance of science, industry, medicine, and education. Current HPC systems are being developed to overcome emerging challenges in order to reach Exascale level of performance, which is expected by the year 2020. The much larger embedded and mobile market allows for rapid development of IP blocks, and provides more flexibility in designing an application-specific SoC, un turn giving possibility in balancing performance, energy-efficiency and cost. In the Mont-Blanc project, we advocate for HPC systems be built from such commodity IP blocks, currently used in embedded and mobile SoCs.As a first demonstrator of such approach, we present the MontBlanc prototype; the first HPC system built with commodity SoCs, memories, and NICs from the embedded and mobile domain, and offthe-shelf HPC networking, storage, cooling and integration solutions. We present the system's architecture, and evaluation including both performance and energy efficiency. Further, we compare the system's abilities against a production level supercomputer. At the end, we discuss parallel scalability, and estimate the maximum scalability point of this approach across a set of applications.

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Section: Related Workmentioning

confidence: 99%

The Mont-Blanc Prototype: An Alternative Approach for HPC Systems

Rajovic¹,

Rico

Mantovani

et al. 2016

SC16: International Conference for High Performance Computing, Networking, Storage and Analysis

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show abstract

“…SATA-based Flash SSDs have been capable of up to 100,000 small (512-byte) random reads per second since 2009 [31], and enterprise-level PCIe-based SSDs claim 1.2 million random I/Os per second [11]. Prototype PCIe NVM platforms achieve similar throughput with latencies of 40 microseconds for phase-change memory [3] and 10 microseconds for NVM emulators [6].…”

Section: The Shrinking Cpu-i/o Gapmentioning

confidence: 99%

“…FAWN-KV was designed for a hardware architecture combining flash devices from a prior generation of CompactFlash or SATA-based SSDs with lowpower processors such as the Intel Atom. The software has therefore already been optimized to minimize memory consumption and CPU overhead to take advantage of SSDs capable of 80,000+ IOPS [31].…”

Section: The Shrinking Cpu-i/o Gapmentioning

confidence: 99%

Using vector interfaces to deliver millions of IOPS from a networked key-value storage server

Vasudevan

Kaminsky

Andersen

2012

Proceedings of the Third ACM Symposium on Cloud Computing

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The performance of non-volatile memories (NVM) has grown by a factor of 100 during the last several years: Flash devices today are capable of over 1 million I/Os per second. Unfortunately, this incredible growth has put strain on software storage systems looking to extract their full potential.To address this increasing software-I/O gap, we propose using vector interfaces in high-performance networked systems. Vector interfaces organize requests and computation in a distributed system into collections of similar but independent units of work, thereby providing opportunities to amortize and eliminate the redundant work common in many high-performance systems. By integrating vector interfaces into storage and RPC components, we demonstrate that a single key-value storage server can provide 1.6 million requests per second with a median latency below one millisecond, over fourteen times greater than the same software absent the use of vector interfaces. We show that pervasively applying vector interfaces is necessary to achieve this potential and describe how to compose these interfaces together to ensure that vectors of work are propagated throughout a distributed system.

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“…The Gordon [1]. A version using the Intel Atom was evaluated across a wide range of workloads [21]. This evaluation showed FAWN breaking the energy-efficient sorting record set by Beckmann in 2010 with similar hardware [4].…”

Section: Related Workmentioning

confidence: 99%

“…Previous work on platforms for sequential I/Ointensive workloads used Atom-based systems on the assumption that the I/O would be the bottleneck and the CPU would thus not be heavily utilized [4,19,21]. However, the SSDs in these systems mitigate this bottleneck for Sort, placing more stress on the CPU.…”

Section: Multi-machine Dryad Benchmarksmentioning

confidence: 99%