Energy-Efficient CMOS Large-Load Driver Circuit with the Complementary Adiabatic/Bootstrap (CAB) Technique for Low-Power TFT-LCD System Applications

Liu, G.Y.; Wang, N.C.; Kuo, J.B.

doi:10.1109/iscas.2005.1465821

Cited by 1 publication

(2 citation statements)

References 6 publications

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“…The bootstrapped driver in [6] performs right for low load. However, it does not have a good performance in the presence of high capacitive loads greater than IOpF, and its active area is high due to bootstrap capacitors.…”

Section: The Driver Circuit Structurementioning

confidence: 99%

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Low-energy multi-path adiabatic CMOS driver for low-energy system applications with large capacitive load

García

Montiel–Nelson

Nooshabadi

2010

2010 17th IEEE International Conference on Electronics, Circuits and Systems

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This paper presents the design of a fast multi-path adi abatic CMOS driver (pr-ad). The proposed pr-ad does not uses bootstrap capacitors to minimise active area, and does not require to maintain high voltage diff erence across the junctions or the gates of output pull-up and output pull down transistors. When implemented on a 65nm CMOS technology, under the large capacitive loading condition (lOpF), pr-ad has a higher active area (33%), but lower energy-delay product (16%) than the reference complemen tary adiabaticlbootstrap circuit (cab-lwk). Also pr-ad has very small effective input capacitance in comparison with cab-lwk because the first does not need bootstrap capaci tors connected with the input.

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Section: The Driver Circuit Structurementioning

confidence: 99%

“…Active areas for cab-lwk [6] ing for STM 65nm process. Figure 6 illustrates the energy efficiency (in energy delay product) versus load capacitance for the two driver circuits.…”

Section: Comparative Evaluationmentioning

confidence: 99%