Energy-Efficient Scheduling of Tasks with Conditional Precedence Constraints on MPSoCs

Tariq, Umair Ullah; Ishak, Suhaimi Abd

doi:10.1007/978-3-030-28430-5_6

Cited by 3 publications

(8 citation statements)

References 28 publications

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“…However, since CAP-Online needs to enumerate all the paths of the conditional graph, its time complexity grows exponentially as the number of tasks increases. Tariq and Wu and Tariq et al in [3], [41] proposed an energy-efficient priority-based list scheduler for scheduling CTGs on MPSoCs. They use successor-tree-consistent-deadline as a priority for each task and employ NLP-based dynamic voltage scaling algorithms to assign voltage to tasks.…”

Section: Related Workmentioning

confidence: 99%

“…They use successor-tree-consistent-deadline as a priority for each task and employ NLP-based dynamic voltage scaling algorithms to assign voltage to tasks. Additionally, techniques presented in [3] assume that processors operate at discrete frequency levels whereas the approach in [41] considers processors operate at continuous frequency levels. The methods proposed by [3], [16], [17], [41] are tailored for the scheduling of CTGs on MPSoCs.…”

Section: Related Workmentioning

confidence: 99%

“…Additionally, techniques presented in [3] assume that processors operate at discrete frequency levels whereas the approach in [41] considers processors operate at continuous frequency levels. The methods proposed by [3], [16], [17], [41] are tailored for the scheduling of CTGs on MPSoCs. However, a pressing requirement exists for an energy-efficient approach to schedule PCTGs on MPSoCs.…”

Section: Related Workmentioning

confidence: 99%

“…Designers are leveraging multicore architectures to meet increasing computational requirements while managing power consumption and design complexity [1]. Multi-core architectures such as Multiprocessor Systemon-Chips (MPSoCs) have received intensive interest in the embedded systems community due to their high performance, exceptional Quality-of-Service (QoS), and low power consumption [2], [3]. Prioritizing energy minimization in high-performance embedded systems yield a multitude of advantages, ranging from decreased heat dissipation and increased reliability to improved performance and greater environmental sustainability.…”

mentioning

confidence: 99%

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Energy-Aware Successor Tree Consistent EDF Scheduling for PCTGs on MPSoCs

Tariq,

Ali,

Nadeem

et al. 2024

IEEE Access

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Multiprocessor System-on-Chips (MPSoCs) computing architectures are gaining popularity due to their high-performance capabilities and exceptional Quality-of-Service (QoS), making them a particularly wellsuited computing platform for computationally intensive workloads and applications. Nonetheless, The scheduling and allocation of a single task set with precedence restrictions on MPSoCs have presented a persistent research challenge in acquiring energy-efficient solutions. The complexity of this scheduling problem escalates when subject to conditional precedence constraints between the tasks, creating what is known as a Conditional Task Graph (CTG). Scheduling sets of Periodic Conditional Task Graphs (PCTGs) on MPSoC platforms poses even more challenges. This paper focuses on tackling the scheduling challenge for a group of PCTGs on MPSoCs equipped with shared memory. The primary goal is to minimize the overall anticipated energy usage, considering two distinct power models: dynamic and static power models. To address this challenge, this paper introduces an innovative scheduling method named Energy Efficient Successor Tree Consistent Earliest Deadline First (EESEDF). The EESEDF approach is primarily designed to maximize the worst-case processor utilization. Once the tasks are assigned to processors, it leverages the earliest successor tree consistent deadline-first strategy to arrange tasks on each processor. To minimize the overall expected energy consumption, EESEDF solves a convex Non-Linear Program (NLP) to determine the optimal speed for each task. Additionally, the paper presents a highly efficient online Dynamic Voltage Scaling (DVS) heuristic, which operates in O(1) time complexity and dynamically adjusts the task speeds in real-time. We achieved the average improvement, maximum improvement, and minimum improvement of EESEDF+Online-DVS 15%, 17%, and 12%, respectively compared to EESEDF alone. Furthermore, in the second set of experiments, we compared EESEDF against state-of-the-art techniques LESA and NCM. The results showed that EESEDF+Online-DVS outperformed these existing approaches, achieving notable energy efficiency improvements of 25% and 20% over LESA and NCM, respectively. Our proposed scheduler, EESEDF+Online-DVS, also achieves significant energy efficiency gains compared to existing methods. It outperforms IOETCS-Heuristic by approximately 13% while surpassing BESS and CAP-Online by impressive margins of 25% and 35%, respectively.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

mentioning

confidence: 99%

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Energy-Aware Successor Tree Consistent EDF Scheduling for PCTGs on MPSoCs

Tariq,

Ali,

Nadeem

et al. 2024

IEEE Access

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“…This problem gained more attention in the research community with the increase in energy consumption of multiprocessors [3], [4]. However, most of the published literature deals with optimizing performance (schedule length or makespan) along with only dynamic power consumption [5], [6]. Dynamic voltage and frequency scaling (DVFS) is one widely employed technique to reduce the dynamic power consumption by running certain tasks on low voltage-frequency pairs.…”

Section: Introductionmentioning

confidence: 99%

Dynamic and Static Energy Efficient Scheduling of Task Graphs on Multiprocessors: A Heuristic

2020

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For energy efficient scheduling of task graphs on multiprocessors, dynamic voltage and frequency scaling (DVFS) and duplication are two widely used techniques. DVFS is generally used to utilize the execution slack by lowering the voltage and frequency of a task to decrease the dynamic energy consumption. Whereas duplication decreases the schedule length and communication energy consumption by replicating certain dependent tasks to avoid communication delays. However, while making decisions on DVFS and duplication for a task, the static energy consumption is mostly overlooked. With chip technologies reducing to a few nano meters, static energy consumption due to leakage current has become important. This article proposes a novel polynomial time heuristic that uses both DVFS and duplication to optimize static energy consumption along with dynamic and communication energy when scheduling task graphs on heterogeneous multiprocessors. The proposed list scheduling algorithm also balances schedule length with energy consumption using proposed normalized difference parameters while making scheduling decisions for a particular task. The results demonstrate the ability of the proposed algorithm to decrease the overall energy consumption with an improved or comparable schedule length as compared with other algorithms in various scenarios.

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