Energy management for real-time embedded applications with compiler support

AbouGhazaleh, Nevine; Childers, Bruce R.; Mossé, Daniel; Melhem, Rami; Craven, Matthew

doi:10.1145/780732.780771

Cited by 16 publications

(4 citation statements)

References 6 publications

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“…AbouGhazaleh, Childers, et. al [1] proposed an algorithm to insert power management points into a program; our goal is to insert fewer posting events in the code. This can be accomplished by selecting an error threshold, E, such that any error in the prediction which is less than E can be ignored.…”

Section: Encoding To Minimize Runtime Post Costmentioning

confidence: 99%

Compiler and runtime support for predictive control of power and cooling

Dietz¹,

Dieter²

2006

Proceedings 20th IEEE International Parallel &Amp; Distributed Processing Symposium

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Section: Encoding To Minimize Runtime Post Costmentioning

confidence: 99%

Compiler and runtime support for predictive control of power and cooling

Dietz¹,

Dieter²

2006

Proceedings 20th IEEE International Parallel &Amp; Distributed Processing Symposium

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“…In the PMH-placement algorithm [AbouGhazaleh et al 2003a], while traversing the CFG of a procedure, a cycle counter ac is incremented by the value of the elapsed worst-case cycles of each traversed region. A PMH is inserted in the code just before this counter exceeds the PMP interval and the counter is reset.…”

Section: Placement Of Pmhsmentioning

confidence: 99%

Collaborative operating system and compiler power management for real-time applications

AbouGhazaleh

Mossé

Childers

et al. 2006

ACM Trans. Embed. Comput. Syst.

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Managing energy consumption has become vitally important to battery-operated portable and embedded systems. Dynamic voltage scaling (DVS) reduces the processor's dynamic power consumption quadratically at the expense of linearly decreasing the performance. When reducing energy with DVS for real-time systems, one must consider the performance penalty to ensure that deadlines can be met. In this paper, we introduce a novel collaborative approach between the compiler and the operating system (OS) to reduce energy consumption. We use the compiler to annotate an application's source code with path-dependent information called power-management hints (PMHs). This fine-grained information captures the temporal behavior of the application, which varies by executing different paths. During program execution, the OS periodically changes the processor's frequency and voltage based on the temporal information provided by the PMHs. These speed adaptation points are called power-management points (PMPs). We evaluate our scheme using three embedded applications: a video decoder, automatic target recognition, and a sub-band tuner. Our scheme shows an energy reduction of up to 57% over no power-management and up to 32% over a static power-management scheme. We compare our scheme to other schemes that solely utilize PMPs for power-management and show experimentally that our scheme achieves more energy savings. We also analyze the advantages and disadvantages of our approach relative to another compiler-directed scheme.

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“…Rather than only updating slack at scheduling points, AbouGhazaleh, Childers, et. al [1] introduce compiler support to insert power management points into a program. At each power management point the compiler provides updated WCET information, which is periodically used to update the current clock frequency.…”

Section: Related Workmentioning

confidence: 99%

Power reduction by varying sampling rate

Dieter¹,

Datta²,

Kai³

2005

ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005.

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The rate at which a digital signal processing (DSP) system operates depends on the highest frequency component in the input signal. DSP applications must sample their inputs at a frequency at least twice the highest frequency in the input signal (i.e., the Nyquist rate) to accurately reproduce the signal. Typically a fixed sampling rate, guaranteed to always be high enough, is used. However, an input signal may have periods when the signal has little high frequency content as well as periods of silence. When the input signal has no perceptible high frequency components, the system can reduce its sampling rate, thereby reducing the number of samples processed per second, allowing the CPU speed to be scaled down without reducing output quality. This paper describes how to reduce power consumption in DSP applications by varying the amount of processing based on the input signal, and reports results of experiments with a prototype implementation. Experiments with a prototype show that when the system performs little processing, the added overhead of the variable sampling rate technique increased power consumption. When the system performs more processing, 18 FIR filters per frame, the power consumption was reduced to 40 % of the power required for a static sampling rate, while not reducing sound quality.

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Energy management for real-time embedded applications with compiler support

Cited by 16 publications

References 6 publications

Compiler and runtime support for predictive control of power and cooling

Compiler and runtime support for predictive control of power and cooling

Collaborative operating system and compiler power management for real-time applications

Power reduction by varying sampling rate

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