Enhanced RF to DC CMOS rectifier with capacitor-bootstrapped transistor

Ebrahimian, Mahsa; El‐Sankary, Kamal; El-Masry, E.I.

doi:10.1109/iscas.2010.5537481

Cited by 8 publications

(2 citation statements)

References 6 publications

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“…Note that the voltage conversion efficiency is defined by V out /V in [23]. The voltage and power conversion efficiency of the voltage multiplier are simulated at the input voltage amplitude of 800 mV at 900 MHz.…”

Section: Model Of Threshold Voltage Compensationmentioning

confidence: 99%

Process and temperature robust voltage multiplier design for RF energy harvesting

Yuan

2015

Microelectronics Reliability

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Section: Model Of Threshold Voltage Compensationmentioning

confidence: 99%

Process and temperature robust voltage multiplier design for RF energy harvesting

Yuan

2015

Microelectronics Reliability

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“…In [11], various architectures for the voltage multiplier circuit have been proposed, which are suitable for a low input power levels. Similarly, the use of capacitor-bootstrapped transistors have been proposed in [12], to overcome the threshold voltage influence in the rectifier. The implementation by using cross-coupled rectifier proposed in [13], which offers improved power efficiency and reduction in loss due to the threshold voltage in a voltage multiplier circuit.…”

Section: Introductionmentioning

confidence: 99%

A novel cascading scheme to improve the performance of voltage multiplier circuits

Chouhan

Halonen

2015

Analog Integr Circ Sig Process

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The voltage multiplier (VM) circuit is a cascade arrangement designed from a series of rectifiers to obtain high DC output voltage. In this classical approach, the DC voltage which is getting generated in the present stage contributes to the next stage. This phenomenon is recurring at every stage resulting into higher DC output voltage than previous. The proposed signaling scheme enables the use of the rectified DC voltage/stage in a classical way along with the involvement of instantaneous input RF voltage. As a result, higher output DC voltage and improved power conversion efficiency (PCE) will be achieved as compared to a conventional VM circuit signaling scheme. The conventional VM circuit used in this work was designed by stacked series arrangement of three standard differential drive rectifiers. Similarly, the proposed VM circuit was formed by implementing proposed signaling scheme into the conventional VM circuit. These architectures were implemented in a standard 0.18 lm CMOS technology The measurements were done by using input RF signal frequency of 433 MHz for resistive load values of 30, 100 KX, and 1 MX respectively. The measured results show that the proposed VM scheme has 22-32 % better power conversion efficiency than the conventional VM scheme.

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Differential Dickson voltage multiplier with matching network for radio frequency harvester

Gunnam

Lai

Sung

2017

2017 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW)

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Enhanced RF to DC CMOS rectifier with capacitor-bootstrapped transistor

Cited by 8 publications

References 6 publications

Process and temperature robust voltage multiplier design for RF energy harvesting

Process and temperature robust voltage multiplier design for RF energy harvesting

A novel cascading scheme to improve the performance of voltage multiplier circuits

Differential Dickson voltage multiplier with matching network for radio frequency harvester

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