Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology

Passos, Fábio; Martins, Ricardo; Lourenço, Nuno; Roca, E.; Póvoa, Ricardo; Canelas, António; Castro-López, R.; Horta, Nuno; Fernández, Francisco V.

doi:10.1016/j.vlsi.2018.02.005

Cited by 18 publications

(6 citation statements)

References 20 publications

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“…This optimization process achieves a good balance between the two objectives, since there is a trade-off between them, the optimization execution takes several hours to run. In [31], two design tools AIDA and SIDe-O to design a robust LC-tank VCO are introduced. SIDe-O is employed to face the problems relative to the passive elements and through AIDA a robust design is assured due to its corner-aware approach and NSGA-II is employed for the phase noise, power consumption and area minimization, as in the previous case the algorithm takes several hours to run, in both algorithms none of the objectives are focused on achieving a higher oscillation frequency.…”

Section: Vco Optimization Methodsmentioning

confidence: 99%

Single-Objective Optimization of a CMOS VCO Considering PVT and Monte Carlo Simulations

Castañeda-Aviña

Tlelo‐Cuautle

Fraga

2020

MCA

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The optimization of analog integrated circuits requires to take into account a number of considerations and trade-offs that are specific to each circuit, meaning that each case of design may be subject to different constraints to accomplish target specifications. This paper shows the single-objective optimization of a complementary metal-oxide-semiconductor (CMOS) four-stage voltage-controlled oscillator (VCO) to maximize the oscillation frequency. The stages are designed by using CMOS current-mode logic or differential pairs and are connected in a ring structure. The optimization is performed by applying differential evolution (DE) algorithm, in which the design variables are the control voltage and the transistors’ widths and lengths. The objective is maximizing the oscillation frequency under the constraints so that the CMOS VCO be robust to Monte Carlo simulations and to process-voltage-temperature (PVT) variations. The optimization results show that DE provides feasible solutions oscillating at 5 GHz with a wide control voltage range and robust to both Monte Carlo and PVT analyses.

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Section: Vco Optimization Methodsmentioning

confidence: 99%

Single-Objective Optimization of a CMOS VCO Considering PVT and Monte Carlo Simulations

Castañeda-Aviña

Tlelo‐Cuautle

Fraga

2020

MCA

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“…in order to find inductors that meet the target specification. Various optimization approaches have been used in the literature: Genetic Algorithm (GA) [2,9], Heuristic Techniques [4], Bayesian Optimization (BO) [16], Evolutionary Computation and Gaussian-Process Surrogate Modeling [13], and Corner-Aware Optimization [12].…”

Section: Template Optimizationmentioning

confidence: 99%

Drawing Inductor Layout with a Reinforcement Learning Agent: Method and Application for VCO Inductors

Haigh¹,

Zhang²,

Hassanpour³

et al. 2022

Preprint

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Design of Voltage-Controlled Oscillator (VCO) inductors is a laborious and time-consuming task that is conventionally done manually by human experts. In this paper, we propose a framework for automating the design of VCO inductors, using Reinforcement Learning (RL). We formulate the problem as a sequential procedure, where wire segments are drawn one after another, until a complete inductor is created. We then employ an RL agent to learn to draw inductors that meet certain target specifications. In light of the need to tweak the target specifications throughout the circuit design cycle, we also develop a variant in which the agent can learn to quickly adapt to draw new inductors for moderately different target specifications. Our empirical results show that the proposed framework is successful at automatically generating VCO inductors that meet or exceed the target specification.

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“…None of the previously mentioned methodologies consider the impact of process variations and mismatch, which is unbearable in modern nanometer technologies. In the past, the lack of mature RF yield-aware design techniques led to the adoption of typical digital IC design techniques, like process, voltage, and temperature (PVT) corner analysis, and some works included such corner analysis in the optimization-based techniques [17]. However, such techniques are not the best suited since RF ICs are particularly sensitive to local or intradie variations, which are not considered by the PVT analysis.…”

Section: A Rf Ic Variability-aware Synthesismentioning

confidence: 99%

Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs

et al. 2021

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This paper presents an innovative yield-aware synthesis strategy based on a hierarchical bottom-up methodology that uses a multiobjective evolutionary optimization algorithm to design a complete radiofrequency integrated circuit from the passive component level up to the system level. Within it, performances' calculation aims for the highest possible accuracy. A surrogate model calculates the performances for the inductive devices, with accuracy comparable to full electromagnetic simulation; and, an electrical simulator calculates circuit-and system-level performances. Yield is calculated using Monte-Carlo (MC) analysis with the foundry-provided models without any model approximation. The computation of the circuit yield throughout the hierarchy is estimated employing parallelism and reducing the number of simulations by performing MC analysis only to a reduced number of candidate solutions, alleviating the computational requirements during the optimization. The yield of the elements not accurately evaluated is assigned using their degree of similitude to the simulated solutions. The result is a novel synthesis methodology that reduces the total optimization time compared to a complete MC yield-aware optimization. Ultimately, the methodology proposed in this work is compared against other methodologies that do not consider yield throughout the system's complete hierarchy, demonstrating that it is necessary to consider it over the entire hierarchy to achieve robust optimal designs.

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Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology

Cited by 18 publications

References 20 publications

Single-Objective Optimization of a CMOS VCO Considering PVT and Monte Carlo Simulations

Single-Objective Optimization of a CMOS VCO Considering PVT and Monte Carlo Simulations

Drawing Inductor Layout with a Reinforcement Learning Agent: Method and Application for VCO Inductors

Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs

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