The design of a wide-band voltage-controlled oscillator (VCO) modified as a VCO with programmable tail currents is introduced herein. The VCO is implemented by using CMOS current-mode logic stages, which are based on differential pairs that are connected in a ring topology. SPICE simulation results show that the VCO operates within the frequency ranges of 2.65–5.65 GHz, and when it is modified, the VCO with programmable tail currents operates between 1.38 GHz and 4.72 GHz. The design of the CMOS differential stage is detailed along with the symbolic approximation of its dominant pole, which is varied to increase the frequency response in order to achieve a higher oscillation frequency when implementing the ring oscillator structure. The layout of the VCO is described and pre- and post-layout simulations are provided, which are in good agreement using CMOS technology of 180 nm. Finally, process, voltage and temperature variations are performed to guarantee robustness of the designed CMOS ring oscillator.

Fractional-order chaotic oscillators (FOCOs) have shown more complexity than integer-order chaotic ones. However, the majority of electronic implementations were performed using embedded systems; compared to analog implementations, they require huge hardware resources to approximate the solution of the fractional-order derivatives. In this manner, we propose the design of FOCOs using fractional-order integrators based on operational transconductance amplifiers (OTAs). The case study shows the implementation of FOCOs by cascading first-order OTA-based filters designed with complementary metal-oxide-semiconductor (CMOS) technology. The OTAs have programmable transconductance, and the robustness of the fractional-order integrator is verified by performing process, voltage and temperature variations as well as Monte Carlo analyses for a CMOS technology of 180 nm from the United Microelectronics Corporation. Finally, it is highlighted that post-layout simulations are in good agreement with the simulations of the mathematical model of the FOCO.

The optimization of analog integrated circuits requires to take into account a number of considerations and trade-offs that are specific to each circuit, meaning that each case of design may be subject to different constraints to accomplish target specifications. This paper shows the single-objective optimization of a complementary metal-oxide-semiconductor (CMOS) four-stage voltage-controlled oscillator (VCO) to maximize the oscillation frequency. The stages are designed by using CMOS current-mode logic or differential pairs and are connected in a ring structure. The optimization is performed by applying differential evolution (DE) algorithm, in which the design variables are the control voltage and the transistors’ widths and lengths. The objective is maximizing the oscillation frequency under the constraints so that the CMOS VCO be robust to Monte Carlo simulations and to process-voltage-temperature (PVT) variations. The optimization results show that DE provides feasible solutions oscillating at 5 GHz with a wide control voltage range and robust to both Monte Carlo and PVT analyses.

<abstract><p>Real applications of integrated circuits (ICs) require satisfying strong target specifications, which challenge is focused on trading off specifications that are in conflict, i.e. improving one characteristic can degrade other(s). This is the case of designing a ring voltage-controlled oscillator (VCO) using IC nanometer technology, with the goal to accomplish a wide frequency and voltage-control tuning range, low silicon area, among others. For real ring VCO applications, an open challenge is guaranteeing minimum phase noise, which is in conflict with main dynamical characteristics when maximizing frequency range, voltage-control range, gain, and minimizing silicon area and power consumption. To cope with these design problems, we show the minimization of the phase noise of a ring VCO applying two metaheuristics, namely: Differential evolution (DE) and particle swarm optimization (PSO), which have the ability to handle constraints that are relevant to generate optimal solutions. The results show that both DE and PSO are effective in the optimization of the ring VCO. The comparison of the best phase noise results obtained with DE (-129.01 dBc/Hz @1MHz) and PSO (-124.67 dBc/Hz @1MHz) algorithms, not only show that the DE solution being lower by 4.34 dBc/Hz with respect to the best solution provided by PSO, but also it is quite satisfactory in contrast to similar works. Finally, the optimized ring VCO characteristics are compared herein with several designs considering a figure of merit, gain, frequency and voltage-control ranges.</p></abstract>