2015 IEEE 27th International Symposium on Power Semiconductor Devices &Amp; IC's (ISPSD) 2015
DOI: 10.1109/ispsd.2015.7123432
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Enhancement-mode GaN-on-Silicon MOS-HEMT using pure wet etch technique

Abstract: a) (b) Fig. 1. Schematic cross-section of GaN-MOS HEMTs (a) and atomic force microscope (AFM) image of the fully recessed gate region (b). Abstract-This paper reports for the first time a gate-recessed GaN-on-Silicon MOS-HEMT device with true normally-off operation and high breakdown voltage using a one step simultaneous oxidation/dissolving treatment by hybrid alkaline solution with hydrogen peroxide and potassium hydroxide. After 40-min wet etching at 95 ºC solution temperature, the Al 2 O 3 /GaN MOS-HEMT de… Show more

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Cited by 10 publications
(3 citation statements)
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“…The strong polarization effect between AlGaN and GaN will confine the electrons at the surface of the GaN channel, thereby forming a 2-dimensional electron gas (2DEG) with high mobility [ 8 , 9 ]. At the same time, GaN-on-silicon is widely used owing to its low cost and large size, which can be integrated with Si-CMOS technology [ 10 , 11 ]. In recent years, there have been an increasing number of reports on high-performance AlGaN/GaN HEMT devices [ 12 , 13 , 14 , 15 , 16 , 17 ], however, there is still a large gap between the limits of GaN material properties and commercial devices.…”
Section: Introductionmentioning
confidence: 99%
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“…The strong polarization effect between AlGaN and GaN will confine the electrons at the surface of the GaN channel, thereby forming a 2-dimensional electron gas (2DEG) with high mobility [ 8 , 9 ]. At the same time, GaN-on-silicon is widely used owing to its low cost and large size, which can be integrated with Si-CMOS technology [ 10 , 11 ]. In recent years, there have been an increasing number of reports on high-performance AlGaN/GaN HEMT devices [ 12 , 13 , 14 , 15 , 16 , 17 ], however, there is still a large gap between the limits of GaN material properties and commercial devices.…”
Section: Introductionmentioning
confidence: 99%
“…In the fabrication process, the field plate is connected to the gate and placed over the passivation layer. However, the improvement of the device performance depends on the lateral length of the field plate, and the breakdown voltage rises at the beginning and then declines with increasing field plate [ 11 , 12 , 13 , 14 , 15 , 16 , 17 , 18 , 19 , 20 , 21 ]. At the same time, the field plate is equivalent to increasing the electrode overlapping area, which brings the corresponding parasitic capacitance and deteriorates the switching performance of the device.…”
Section: Introductionmentioning
confidence: 99%
“…The third one is using wet etching to form the groove under the gate region, and then a better quality dielectric layer is grown above the gate region. [6] Using this way, the etching depth can be precisely controlled, but the process is time consuming and the lateral extension under the gate region cannot be ignored.…”
Section: Introductionmentioning
confidence: 99%