Enhancement of Transistor-to-Transistor Variability Due to Total Dose Effects in 65-nm MOSFETs

Gerardin, Simone; Bagatin, M.; Cornale, D.; Ding, Lili; Mattiazzo, Serena; Paccagnella, A.; Faccio, F.; Michelis, S.

doi:10.1109/tns.2015.2498539

Cited by 33 publications

(7 citation statements)

References 14 publications

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“…On the other hand 3.3 V N-channel transistors did not exhibit any ∆V ot after several MGy and their threshold voltage was only influenced by a limited interface state induced shift (∆V it ) [2]. Such enhanced sensitivity of P-channel MOSFETs has been reported on several technology nodes and foundries [9]- [11] and its root cause, that seems to differ from one node to another, is still under investigation.…”

Section: Experimental Details a The Furhi Sensormentioning

confidence: 90%

“…The root cause of this MOSFET variability is linked to manufacturing process variations and it is further studied and discussed in a companion paper [13]. It is worth noting that comparable enhanced variability of CMOS MOSFETs has been recently reported in this TID range in another CMOS process [11], but the physical origin may differ from one process to another.…”

Section: B Analog Readout Chainmentioning

confidence: 99%

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Total Ionizing Dose Effects on a Radiation-Hardened CMOS Image Sensor Demonstrator for ITER Remote Handling

Goiffon¹,

Rizzolo²,

Corbière³

et al. 2018

IEEE Trans. Nucl. Sci.

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Abstract-Total Ionizing Dose (TID) effects are studied on a radiation hardened by design (RHBD) 256x256-pixel CMOS image sensor (CIS) demonstrator developed for ITER remote handling by using X and γ-rays irradiations. The (color) imaging capabilities of the RHBD CIS are demonstrated up to 10 MGy(SiO2), 1 Grad(SiO2), validating the radiation hardness of most of the designed integrated circuit. No significant sensitivity (i.e. responsivity and color filter transmittance) or readout noise degradation is observed. The proposed readout chain architecture allows achieving a maximum output voltage swing larger than 1 V at 10 MGy(SiO2). The influence of several pixel layout (the gate oxide thickness, the gate overlap distance and the use of an in-pixel P+ ring) and manufacturing process parameters (photodiode doping profile, process variation) on the radiation induced dark current increase is studied. The nature of the dark current draining mechanism used to cancel most of the radiation induced degradation is also discussed and clarified.

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Section: Experimental Details a The Furhi Sensormentioning

confidence: 90%

Section: B Analog Readout Chainmentioning

confidence: 99%

Total Ionizing Dose Effects on a Radiation-Hardened CMOS Image Sensor Demonstrator for ITER Remote Handling

Goiffon¹,

Rizzolo²,

Corbière³

et al. 2018

IEEE Trans. Nucl. Sci.

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“…However, those environments can contain high amounts of ionizing radiation that degrade the silicon transistors' operation, resulting in a reduced performance and increased system noise [3] [4]. Not only does the performance of the circuit typically degenerate due to mismatch [5] and reduced drive strength, also high-energy particles create upsets and transients in circuits where triplication is sometimes difficult to enforce [6] [7].…”

Section: Introductionmentioning

confidence: 99%

Comparison of a 65 nm CMOS Ring- and LC-Oscillator Based PLL in Terms of TID and SEU Sensitivity

Prinzie

Christiansen

Moreira

et al. 2017

IEEE Trans. Nucl. Sci.

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Abstract-In this work, a comparison has been made between a low noise ring-oscillator and an LC-oscillator Phase Locked Loop (PLL). An ASIC has been developed to conduct irradiation experiments targeting high-energy physics applications. Two different samples were irradiated up to a total ionizing dose (TID) in SiO2 of 200 Mrad and 600 Mrad with a 100• C thermal annealing step. Single-Event Upset (SEU) tests were performed with heavy ions with LETs (Linear Energy Transfer) between 3.2 and 69.2 MeV.cm 2 /mg. A Two-photon absorption (TPA) laser facility has been used to provide detailed results on the SEU sensitivity. Both independent PLLs have identical loop dynamics to allow a fair comparison including a Triple-Modular Redundant (TMR) divider and TMR phase detector. Furthermore these circuits consume the same amount of power. The PLLs were processed in a commercial 65 nm CMOS technology.

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“…The FURHI CIS characterization has revealed new imager performance degradation sources due the V th MOSFETs variability. This aspect, addressed in [6] up to TID of 500 Mrad(SiO 2 ) on few tens structures evidenced that variability in the on-current is enhanced due to the impact of random dopant fluctuations on TID effects. However, beyond this work, very little is known about the TID variability of MOSFETs characteristics in the MGy range.…”

Section: Introductionmentioning

confidence: 99%

Multi-MGy Total Ionizing Dose Induced MOSFET Variability Effects on Radiation Hardened CMOS Image Sensor Performances

Rizzolo

Goiffon

Sergent

et al. 2017

2017 17th European Conference on Radiation and Its Effects on Components and Systems (RADECS)

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Enhancement of Transistor-to-Transistor Variability Due to Total Dose Effects in 65-nm MOSFETs

Cited by 33 publications

References 14 publications

Total Ionizing Dose Effects on a Radiation-Hardened CMOS Image Sensor Demonstrator for ITER Remote Handling

Total Ionizing Dose Effects on a Radiation-Hardened CMOS Image Sensor Demonstrator for ITER Remote Handling

Comparison of a 65 nm CMOS Ring- and LC-Oscillator Based PLL in Terms of TID and SEU Sensitivity

Multi-MGy Total Ionizing Dose Induced MOSFET Variability Effects on Radiation Hardened CMOS Image Sensor Performances

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