Enhancement of tunneling electroresistance by interfacial cation intermixing in ferroelectric tunnel junctions

Chen, Liming; Feng, Yuzhang; Chen, Yequan; Chen, Yongda; Liu, Ruxin; Pan, Danfeng; Wang, Peng; Xu, Yongbing; Zhang, Rong; Wang, Xuefeng

doi:10.1016/j.apsusc.2020.145707

Cited by 8 publications

(10 citation statements)

References 41 publications

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“…Figure a,b shows current–voltage ( I–V ) curves at different temperatures (from 300 to 10 K) for the ON (the low resistance) and the OFF (the high resistance) states of the FTJ. As reported previously, the interfacial effect plays the main role in the transport of the LSMO/BTO/Nb:STO device . The changes in the polarization direction of the ferroelectric layer result in the variation of the valence ratio of Mn.…”

Section: Resultsmentioning

confidence: 51%

“…These properties are mainly attributable to the Nb:STO (semiconducting bottom electrode), which changes the shape of the barrier between the electrode and the tunneling layer by an extra energy barrier and thus enhances the TER. , On the other hand, the Nb:STO electrode has a higher carrier concentration and a lower work function, which are conducive to improving the operation speed . Furthermore, it has also been confirmed that interfacial phase transitions can be triggered by the ferroelectric film cooperating with strongly correlated oxide electrodes. , To date, the La 0.7 Sr 0.3 MnO 3 (LSMO) film has replaced the precious metal Pt as the upper electrode in FTJs, and the switching current ratio is significantly increased in the La 0.7 Sr 0.3 MnO 3 (LSMO)/BTO/Nb:STO FTJ by modulation of the interface resistance state at room temperature. , The cation intermixing (Mn–Ti) at the LSMO/BTO interface is modulated by polarization transformation of the BTO layer, giving rise to the variation of the valence ratio of Mn including magnetic exchange interactions. Thus, the tunneling behavior of the FTJ is tuned .…”

Section: Introductionmentioning

confidence: 99%

“…Furthermore, it has also been confirmed that interfacial phase transitions can be triggered by the ferroelectric film cooperating with strongly correlated oxide electrodes. , To date, the La 0.7 Sr 0.3 MnO 3 (LSMO) film has replaced the precious metal Pt as the upper electrode in FTJs, and the switching current ratio is significantly increased in the La 0.7 Sr 0.3 MnO 3 (LSMO)/BTO/Nb:STO FTJ by modulation of the interface resistance state at room temperature. , The cation intermixing (Mn–Ti) at the LSMO/BTO interface is modulated by polarization transformation of the BTO layer, giving rise to the variation of the valence ratio of Mn including magnetic exchange interactions. Thus, the tunneling behavior of the FTJ is tuned . Despite the enormous potential of ferroelectric/semiconductor-type FTJs to serve as alternative nonvolatile memories, the progress so far has concentrated upon room temperature owing to a small ON/OFF ratio, limiting its application for low-temperature operations .…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Low-Temperature Tunneling Electroresistance in Ferromagnetic Metal/Ferroelectric/Semiconductor Tunnel Junctions

Chen

Zhou

Zhang

et al. 2021

ACS Appl. Mater. Interfaces

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Ferroelectric tunnel junctions (FTJs) as artificial synaptic devices are promising candidates for the building block of nonvolatile data storage devices. However, a small ON/OFF ratio of FTJs limits their application in low-temperature operations. In this work, the influence of quantum interference effects on tunneling electroresistance in the La0.7Sr0.3MnO3/BaTiO3/Nb:SrTiO3 (ferromagnetic metal/ferroelectric/semiconductor) FTJ at low temperatures is investigated. The Current–voltage curves are observed in the tunnel junction from 300 to 10 K with a six-unit-cell thick BaTiO3 film by the ferroelectric polarization effect. First, the ON/OFF current ratio increases from 300 to 30 K due to the increase of polarization in the ferroelectric barrier, and then, it gradually decreases when the temperature drops below 30 K. An anomalous ON/OFF current ratio of ∼105 is obtained at 30 K. The low-temperature tunneling properties in the FTJ are associated with a low-temperature resistivity minimum in the ferromagnetic metal layer by the electron–electron interaction, which increases the La0.7Sr0.3MnO3/BaTiO3 interface resistance, leading to a higher resistance state and lower I OFF for the OFF state. As a result, the ON/OFF current ratio is abruptly enhanced at 30 K. Our results emphasize the crucial role of transport properties of La0.7Sr0.3MnO3 in FTJs and pave the way for the design and application of FTJs at low temperatures.

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Section: Resultsmentioning

confidence: 51%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Low-Temperature Tunneling Electroresistance in Ferromagnetic Metal/Ferroelectric/Semiconductor Tunnel Junctions

Chen

Zhou

Zhang

et al. 2021

ACS Appl. Mater. Interfaces

Self Cite

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“…Taking the magnetoelectrics coupling effect at the ferroelectric/ferromagnetic metal interface into consideration, the interface-dependent ferroelectric domain configurations of BTO can impact on the transport properties because the electronic structure of LSMO at the interface plays a crucial role in the resistive performance of MFTJs. , Both top and bottom LSMO interface resistances can be tuned by polarization inversion of the ferroelectric barrier. The resistance of LSMO with BTO polarized toward is increased because the double exchange coupling between Mn 3+ and Mn 4+ is weakened by the negative screening charges accumulation (Figure ).…”

Section: Discussionmentioning

confidence: 99%

Direct Observation of Interface-Dependent Multidomain State in the BaTiO₃ Tunnel Barrier of a Multiferroic Tunnel Junction Memristor

Zhang

Zhu

2021

ACS Appl. Mater. Interfaces

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Multiferroic tunnel junctions (MFTJs), normally consisting of a four-state resistance, have been studied extensively as a potential candidate for nonvolatile memory devices. More interestingly, the MFTJs whose resistance can be tuned continuously with applied voltage were also reported recently. Since the performance of MFTJs is closely related to their interfacial structures, it is necessary to investigate MFTJs at the atomic scale. In this work, atomic-resolution HAADF, ABF, and EELS of the La0.7Sr0.3MnO3/BaTiO3/La0.7Sr0.3MnO3 MFTJ memristor have been obtained with aberration-corrected scanning transmission electron microscopy (STEM). These results demonstrate varied degree of interfacial cation intermixing at the bottom BTO/LSMO interface, which has a direct influence on the polarization of the ferroelectric barrier BTO and the electronic structure of Mn near the interfaces. We also took advantage of a simplified model to explain the relation between the interfacial behavior and polarization states, which could be a contributing factor to the transport properties of this MFTJ.

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“…Many reports have suggested that computation efficiency can be improved by logic-in-memory computing, [149][150][151] which does not require data transfer between the gate and latch. Due to fast access speed and nonvolatility, memristors are strong candidates to compose stateful 4F 2 [126] 4F 2 [127] 4F 2 [128] Feature size (F) 15 nm 17.5 nm 2 nm [95] 2.5 nm [126] 5 nm [129] 20 nm [24] Density 512 GB 32 GB 32 GB [130] 128 GB [50] 4 GB [131] -On/off ratio --10 8 [121] 10 3 [18] 10 [22] 10 4 [132] Endurance (cycles) 10 5 10 15 10 12 [27] 10 11 [133] 10 14 [125] 10 9 [134] Retention >10 y 64 ms >10 y [31] >10 y [122] >10 y [21] >10 y [135] Operation energy 160 pJ -8 fJ [136] 100 fJ [137] 6 fJ [124] 100 fJ [138] Programming speed 80 μs 1 0 n s 8 5 p s [139] 700 ps [122] 190 ps [140] 600 ps [141] Multi-level operation --Neuromorphic computing 64 [142] 16 [143] 2 [144] 10 [25] Variability logic, [152][153][154][155][156][1...…”

Section: Logicmentioning

confidence: 99%

Memristive Devices for New Computing Paradigms

Kim

Jang

2020

Advanced Intelligent Systems

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Since the first programmable computers were invented, people have no longer been restricted to paper or canvas to process and store information. Due to the significant advances in complementary metal-oxide-semiconductor (CMOS) technology, computing performance has increased drastically based on Moore's law [1] and Dennard's law. [2] Currently, computing systems are designed based on von Neumann architecture systems, in which the processor and memory regions are separated and bridged by data buses. With the introduction of cache and improved storage capabilities, and with the development of transistor technology, computing performance has improved significantly. However, the processor and memory performance have improved at different rates. Consequently, the performance gap observed between memory hierarchies causes a delay that is known as a von Neumann bottleneck. According to the 2018 International Roadmap for Devices and Systems (IRDS), conventional computing architectures are expected to reach their physical limits in terms of performance by 2024. [3] However, three significant problems arise, of which the first is volatility. A CMOS operates by reading the capacitance values, which is advantageous in distinguishing on and off states. However, small technical nodes result in high capacity leaks, energy losses, and reliability issues. The second obstacle involves scaling. Because CMOS-based von Neumann computing systems have been developed using a three-terminal structure, which consists of a source, drain, and gate, the device size typically exceeds 6F 2 even with smaller feature sizes. As a result, it has become a common trend to fabricate smaller and more integrated devices. The third problem involves speed and energy issues. The incorporation of more sensors and edge computing products has led to data explosion; therefore, data are processed slower due to von Neumann bottlenecks, and an enormous amount of energy is required. Although features, such as bit-cost scalable (BiCS) technology [4] and a merger of processor and memory have been introduced to overcome these issues, [5] it is still necessary to transition to novel computing systems that are more advanced than CMOS-based von Neumann architectures. Memristor (memory resistor) technology, which was proposed by Chua, [6] has gained prominence as the most promising novel computing candidate. Unlike a CMOS, memristors, which show pinched I-V hysteresis, identify values through the resistive reading method rather than through the capacitance reading method. [7] Therefore, new computing systems based on memristors would give the opportunity to step toward next computing technologies. Moreover, because memristors can be integrated into crossbar arrays (CBAs), the theoretical density is 4F 2 , which is expected to overcome the scaling limit of CMOS-based computing. In this article, we introduce four types of memristor materials and present their operation mechanisms in detail. We describe what memristive CBAs consist of and how they operate, and we demonstrat...

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Enhancement of tunneling electroresistance by interfacial cation intermixing in ferroelectric tunnel junctions

Cited by 8 publications

References 41 publications

Low-Temperature Tunneling Electroresistance in Ferromagnetic Metal/Ferroelectric/Semiconductor Tunnel Junctions

Low-Temperature Tunneling Electroresistance in Ferromagnetic Metal/Ferroelectric/Semiconductor Tunnel Junctions

Direct Observation of Interface-Dependent Multidomain State in the BaTiO₃ Tunnel Barrier of a Multiferroic Tunnel Junction Memristor

Memristive Devices for New Computing Paradigms

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Enhancement of tunneling electroresistance by interfacial cation intermixing in ferroelectric tunnel junctions

Cited by 8 publications

References 41 publications

Low-Temperature Tunneling Electroresistance in Ferromagnetic Metal/Ferroelectric/Semiconductor Tunnel Junctions

Low-Temperature Tunneling Electroresistance in Ferromagnetic Metal/Ferroelectric/Semiconductor Tunnel Junctions

Direct Observation of Interface-Dependent Multidomain State in the BaTiO3 Tunnel Barrier of a Multiferroic Tunnel Junction Memristor

Memristive Devices for New Computing Paradigms

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Product

Resources

About

Direct Observation of Interface-Dependent Multidomain State in the BaTiO₃ Tunnel Barrier of a Multiferroic Tunnel Junction Memristor