Enhancing Performance Optimization of Multicore/Multichip Nodes with Data Structure Metrics

Abstract

Program performance optimization is usually based solely on measurements of execution behavior of code segments using hardware performance counters. However, memory access patterns are critical performance limiting factors for today's multicore chips where performance is highly memory bound. Therefore diagnoses and selection of optimizations based only on measurements of the execution behavior of code segments are incomplete because they do not incorporate knowledge of memory access patterns and behaviors. This article presents a low-overhead tool (MACPO) that captures memory traces and computes metrics for the memory access behavior of source-level (C, C++, Fortran) data structures. MACPO explicitly targets the measurement and metrics important to performance optimization for multicore chips. The article also presents a complete process for integrating measurement and analyses of code execution with measurements and analyses of memory access patterns and behaviors for performance optimization, specifically targeting multicore chips and multichip nodes of clusters. MACPO uses more realistic cache models for computation of latency metrics than those used by previous tools. Evaluation of the effectiveness of adding memory access behavior characteristics of data structures to performance optimization was done on subsets of the ASCI, NAS and Rodinia parallel benchmarks and two versions of one application program from a domain not represented in these benchmarks. Adding characteristics of the behavior of data structures enabled easier diagnoses of bottlenecks and more accurate selection of appropriate optimizations than with only code centric behavior measurements. The performance gains ranged from a few percent to 38 percent.

Optimizing agent-based transmission models for infectious diseases

“…On today’s multi-core chips, memory access is a critical performance-limiting factor [ 31 ]. Therefore, we have analyzed software behavior and memory access patterns with a profiling tool for high-performance computing applications, PerfExpert [ 30 ].…”

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“…The increasing complexity of multi‐core and multi‐socket nodes makes performance optimization even more cumbersome. There have been many attempts of development of a more or less universal framework for optimization of algorithms that takes into account the main features of hardware . For example, the pitfalls encountered when trying to characterize both the network and the memory performance of modern machines have been emphasized recently …”

“…There have been many attempts of development of a more or less universal framework for optimization of algorithms that takes into account the main features of hardware. 20,21 For example, the pitfalls encountered when trying to characterize both the network and the memory performance of modern machines have been emphasized recently. 22 The paper of Kutzner et al 23 considers the selection of a best option among alternative GPU-systems for running the GROMACS package.…”