Entity resolution acceleration using the automata processor

Bo, Chunkun; Wang, Ke; Fox, Jon E; Skadron, Kevin

doi:10.1109/bigdata.2016.7840617

Cited by 28 publications

(14 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…We evaluate RAPID against hand-crafted designs for five real-world benchmark applications, which were selected based upon previous research demonstrating significant acceleration using the Automata Processor [4,18,21,23]. Table 3 provides descriptions of the benchmarks used.…”

Section: Discussionmentioning

confidence: 99%

“…We also present algorithms for converting RAPID programs into NFAs for execution with the Automata Processor. While code generation from RAPID for other patternrecognition processors and CPUs is possible, we choose to focus on the AP because of recent promising results [4,18,21,23] and the overall flexibility of the architecture. These studies have reported speedups ranging from 8x-4000x over single-threaded CPU applications.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

RAPID Programming of Pattern-Recognition Processors

Angstadt

Weimer

Skadron

2016

SIGARCH Comput. Archit. News

Self Cite

View full text Add to dashboard Cite

We present RAPID, a high-level programming language and combined imperative and declarative model for programming pattern-recognition processors, such as Micron's Automata Processor (AP). The AP is a novel, non-Von Neumann architecture for direct execution of non-deterministic finite automata (NFAs), and has been demonstrated to provide substantial speedup for a variety of data-processing applications. RAPID is clear, maintainable, concise, and efficient both at compile and run time. Language features, such as code abstraction and parallel control structures, map well to pattern-matching problems, providing clarity and maintainability. For generation of efficient runtime code, we present algorithms to convert RAPID programs into finite automata. Further, we introduce a tessellation technique for configuring the AP, which significantly reduces compile time, increases programmer productivity, and improves maintainability. We evaluate five RAPID programs against custom, baseline implementations previously demonstrated to be significantly accelerated by the AP. We find that RAPID programs are much shorter in length, are expressible at a higher level of abstraction than their handcrafted counterparts, and yield generated code that is often more compact. In addition, our tessellation technique for configuring the AP has comparable device utilization to, and results in compilation that is up to four orders of magnitude faster than, current solutions.

show abstract

Section: Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

RAPID Programming of Pattern-Recognition Processors

Angstadt

Weimer

Skadron

2016

SIGARCH Comput. Archit. News

Self Cite

View full text Add to dashboard Cite

show abstract

“…As sizes of databases explode, it becomes computationally expensive to recognize identical entities for all records with variations allowed. Bo et.al [12] proposed an APaccelerated ER solution, which accelerates the performance bottleneck of fuzzy matching for similar but potentially inexactlymatched names, and use a real-world application to illustrate its effectiveness. Results show 9.5x to 400x speedups, with 9.2% more correct pairs and 43% better generalized merge distance (GMD) cost over Apache Lucene.…”

Section: Other Applicationsmentioning

confidence: 99%

An overview of micron's automata processor

Wang

Angstadt

et al. 2016

Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis

Self Cite

View full text Add to dashboard Cite

Micron's new Automata Processor (AP) architecture exploits the very high and natural level of parallelism found in DRAM technologies to achieve native-hardware implementation of nondeterministic finite automata (NFAs). The use of DRAM technology to implement the NFA states provides high capacity and therefore provide extraordinary parallelism for pattern recognition. In this paper, we give an overview of AP's architecture, programming and applications.

show abstract

“…There are a number of applications that have been explored on this processor, including machine learning [6], natural language processing [4], bioinformatics [5,22], high energy physics [20], and data analytics [23][24][25] itemsets in a database [24]. Searching for DNA motifs is another text-based application that found potential speed up in the AP [5,22].…”

Section: Applications On the Automata Processormentioning

confidence: 99%

IP on AP: Exploring Image Processing on the Automata Processor

Ly¹

View full text Add to dashboard Cite

The Automata Processor is a novel hardware accelerator that can perform pattern matching in parallel. To date, this pattern matching has been limited to one-dimensional problems that can be implemented as flexible string-matching methods such as those found in genomics. In this thesis, we present a novel process of implementing image retrieval using a multinary representation for deployment on an automata framework. Images are encoded into discriminative and unique regular expression descriptors in such a way that can be used for classification purposes. The regular expression descriptors are streamed through sets of non-deterministic finite automata (NFA).To improve performance of this multi-dimensional classification problem, we transform discriminative feature descriptors using a cumulative distribution transform. The transformed features are encoded into regular expressions which can be executed on the automata processor.The thesis also highlights methods of evaluating the similarity between images using these regular expressions in the automata processor. Our image retrieval and classification method improves on classification accuracy and achieves a run-time of less than one one-hundredth of a second per image which represents a three-fold improvement over competing architectures.i ACKNOWLEDGEMENTS

show abstract

Entity resolution acceleration using the automata processor

Cited by 28 publications

References 9 publications

RAPID Programming of Pattern-Recognition Processors

RAPID Programming of Pattern-Recognition Processors

An overview of micron's automata processor

IP on AP: Exploring Image Processing on the Automata Processor

Contact Info

Product

Resources

About