2017
DOI: 10.1016/j.pcrysgrow.2017.10.001
|View full text |Cite
|
Sign up to set email alerts
|

Epitaxial growth of highly mismatched III-V materials on (001) silicon for electronics and optoelectronics

Abstract: Please note: Changes made as a result of publishing processes such as copy-editing, formatting and page numbers may not be reflected in this version. For the definitive version of this publication, please refer to the published source. You are advised to consult the publisher's version if you wish to cite this paper.This version is being made available in accordance with publisher policies. See http://orca.cf.ac.uk/policies.html for usage policies. Copyright and moral rights for publications made available in … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4
1

Citation Types

2
78
0

Year Published

2018
2018
2024
2024

Publication Types

Select...
10

Relationship

1
9

Authors

Journals

citations
Cited by 125 publications
(80 citation statements)
references
References 138 publications
(192 reference statements)
2
78
0
Order By: Relevance
“…A second, equally promising approach is the procedure developed by Li et al at HKUST which utilizes a CMOS compatible crystallographic etch to pattern v-shaped trenches in an on-axis Si substrate, aspect ratio trapping to limit defect propagation, and coalescence of an overgrown GaAs layer to provide bulk templates. 45 The {111} v-groove surface suppresses the formation of antiphase domains and limits TD propagation as demonstrated in the pioneering work at IMEC by Paladugu et al 46 Coalesced films of GaAs-on-v-groove-Si (GoVS) 42 yielded TD densities of 7 × 10 7 cm 2 and stand to be improved significantly with the inclusion of additional dislocation filtering layers and thermal cycle annealing. Efforts are also underway to grow GaAs directly on planar Si by way of an AlAs nucleation layer by Chen et al at University College London resulting in electrically injected lasing, but defect densities have not been reported.…”
Section: Apl Photonics 3 030901 (2018)mentioning
confidence: 99%
“…A second, equally promising approach is the procedure developed by Li et al at HKUST which utilizes a CMOS compatible crystallographic etch to pattern v-shaped trenches in an on-axis Si substrate, aspect ratio trapping to limit defect propagation, and coalescence of an overgrown GaAs layer to provide bulk templates. 45 The {111} v-groove surface suppresses the formation of antiphase domains and limits TD propagation as demonstrated in the pioneering work at IMEC by Paladugu et al 46 Coalesced films of GaAs-on-v-groove-Si (GoVS) 42 yielded TD densities of 7 × 10 7 cm 2 and stand to be improved significantly with the inclusion of additional dislocation filtering layers and thermal cycle annealing. Efforts are also underway to grow GaAs directly on planar Si by way of an AlAs nucleation layer by Chen et al at University College London resulting in electrically injected lasing, but defect densities have not been reported.…”
Section: Apl Photonics 3 030901 (2018)mentioning
confidence: 99%
“…As optoelectronic device performance degrades quickly with the presence of relaxation defects, it is important to achieve a high crystal quality in the active device area and to separate the latter clearly from the region of plastic relaxation. Different methods have been investigated to reduce the defect density in the active layer stack, e.g., the growth of a thick metamorphic buffer or the implementation of defect filter layers such as strained layer superlattices [4,[12][13][14].…”
Section: Introductionmentioning
confidence: 99%
“…1(a)] was directly grown on an n-doped silicon (001) substrate with a 4° off-cut angle towards the [011] plane. To achieve high-quality lasers epitaxially grown on silicon, it is crucial to minimize the impact of TDs generated due to the large lattice mismatch between III-Vs and silicon [5,[30][31][32][33]. Here, special growth techniques have been developed, in which an AlAs nucleation layer, InGaAs/GaAs dislocation filter layers (DFLs) [19] and in-situ thermal annealing [34] have been utilized following previous optimized conditions [21], to deliver high-quality III-V buffer layers grown directly on Si with low TD density of around 1.2 × 10 6 cm -2 determined by transmission electron microscopy (TEM).…”
Section: Introductionmentioning
confidence: 99%