ePVF: An Enhanced Program Vulnerability Factor Methodology for Cross-Layer Resilience Analysis

One Bit is (Not) Enough: An Empirical Study of the Impact of Single and Multiple Bit-Flip Errors

“…Registers could hold data-items of different types such as memory addresses, data variables, and control information. Errors injected in memory addresses are mostly detected by hardware exception mechanisms, causing a higher percentage of crashes and hence lower percentage of SDCs [9], [23]. Both source registers and destination registers could hold a memory address, however, an address may be read multiple times after it is written into.…”

“…The key component of LLVM is its intermediate representation (IR), an assembly-like language that abstracts out the hardware and ISA-specific information. LLFI has been used in several other work [9], [10], [12], for injecting single and double bit-flip errors using inject-on-read and inject-onwrite techniques. In this work, we have extended LLFI to facilitate the injection of multiple bit-flip errors as explained in the next section 1 .…”

“…In practice however, SDCs are the more important class of failures as the erroneous outputs are generated with no indication of failure, making them very difficult to detect. Therefore, instead of the error coverage, we use error resilience [9], [10] as the dependability metric. Error resilience is defined as the conditional probability that the program does not produce an SDC after a transient hardware fault occurs and impacts the program state (i.e., similar to work such as [20], [21], [22] it deals with faults passing the hardware and seen by the software).…”

“…This observation has led researchers to question the validity of the single bit-flip model for representing transient faults due to soft errors. Therefore, the fault model should consider both single-bit and multiple-bit errors when calculating measures such as error coverage [7], [8] and error resilience [9], [10] (we focus on the latter).…”

Towards a More Complete Understanding of SDC Propagation

“…Prior work has explored how deviations from bit-flips in floatingpoint computation impact on convergence properties [16,17]. Other work has used corruption propagation in the development of lowlevel instruction based detection schemes that check invariants or create SDC detectors inside the compiler [23,38] or utilize code replication to detect corruption in instructions that are likely lead to and propagate corrupted state [18,27,28], and understanding long latency crashes [30,45]. This paper combines the latency of programmatic systems of corruption -e.g., segfaults, detection, control flow divergence, with corruption propagation in state variables to discuss the impact of detection latency on recovery options.…”