ESD Design and Analysis by Drain Electrode-Embedded Horizontal Schottky Elements for HV nLDMOSs

Abstract

Electrostatic discharge (ESD) events can severely damage miniature components. Therefore, ESD protection is critical in integrated circuits. In this study, drain-electrode-embedded horizontal Schottky diode contact modulation and Schottky length reduction modulation were performed on a high-voltage 60-V n-channel laterally diffused metal-oxide–semiconductor transistor (nLDMOS) element. The effect of the on-voltage characteristics of cascade Schottky diodes on ESD protection was investigated. By using a transmission-line pulse tester, the trigger voltage, holding voltage, and secondary breakdown current (It2) of the nLDMOS element were determined using the I–V characteristic. As the N+ area was gradually replaced by the parasitic Schottky area at the drain electrode, an equivalent circuit of series Schottky diodes formed, which increased the on-resistance. The larger the Schottky area was the higher the It2 value was. This characteristic can considerably improve the ESD immunity of nLDMOS components (highest improvement of 104%). This is a good strategy for improving ESD reliability without increasing the production steps and fabrication cost.

Influence of Modifications Related to Safe Operating Area Demands on Operation of a Specialized Medium/High-Voltage Unity-Gain Buffer

“…The layouts of these ESD devices differ discernibly. The pad ESD structures are the most critical and are laid out completely in accordance with the special ESD-optimized process rules [24,25] based on or similar to various published ESD-focused layout optimization methods for MOS transistors [26][27][28] and other devices [27,29]. The local mini structures follow the most critical of these rules.…”