ESD-Protected Power Amplifier Design in CMOS for Highly Reliable RF ICs

Abstract

Electrostatic discharge (ESD) failure is a major reliability problem, and ESD protection is an emerging design challenge for radio-frequency (RF) integrated circuits demanding extremely high reliability for wireless applications in harsh environments. This paper reports the design and optimization of a 5-kV ESD-protected 2.4-GHz power amplifier (PA) circuit in a 0.18-μm RFCMOS technology. A new mixed-mode ESD simulation-design method and an accurate RF ESD characterization technique are used to minimize the inevitable ESD-induced parasitic effects, which can significantly degrade PA circuit performance. A novel ESD-aware PA design technique is utilized to optimize whole-chip ESD + P A performance. Experiments show that conventional ESD protection can seriously affect the PA circuit, while optimized ESD protection may resolve such a problem. The optimized ESD-protected PA circuit achieves good whole-chip performance, including 5-kV ESD protection, a linear output of 13.5 dBm, a gain of 20.2 dB, and a power-added efficiency of ∼18%, all favorable in the same design category.Index Terms-Electrostatic discharge (ESD), integrated circuit (IC), power amplifier (PA), radio frequency (RF).

Matching Network Elimination in Broadband Rectennas for High-Efficiency Wireless Power Transfer and Energy Harvesting

“…In the wireless industry today, there have been many devices (such as oscillators, inverters, amplifiers, rectifiers, power dividers, boost converters) and systems that have a high demand for impedance matching networks. A number of techniques for the network design have been reported [1]- [6]. Among them, rectifiers and power amplifiers normally utilize nonlinear elements such as diodes and transistors in the circuits.…”

Implementation of a novel co-design of LVTSCR for effective ESD protection in ultra-deep submicron IC

“…The ESD protection circuit should not interfere with the operation of the core circuits. For radiofrequency (RF) integrated circuit demand extremely high reliability for wireless applications in harsh environments but ESD protection is an emerging design challenge [3]. Experiments give explanation that conventional ESD protection can seriously affect the core circuit, while suggested ESD protection may solve such issue [3].…”

“…For radiofrequency (RF) integrated circuit demand extremely high reliability for wireless applications in harsh environments but ESD protection is an emerging design challenge [3]. Experiments give explanation that conventional ESD protection can seriously affect the core circuit, while suggested ESD protection may solve such issue [3]. In recent years IC technologies continue to goes into very deep sub micrometer regime and very high gigahertz operation band, ESD protection design for RF ICs emerges as a biggest challenge to RF electronic designs [2], [3].…”

“…Experiments give explanation that conventional ESD protection can seriously affect the core circuit, while suggested ESD protection may solve such issue [3]. In recent years IC technologies continue to goes into very deep sub micrometer regime and very high gigahertz operation band, ESD protection design for RF ICs emerges as a biggest challenge to RF electronic designs [2], [3]. The huge challenge for the RF ESD protection design is related with the proper synchronization between the ESD protection structures and the RF IC core circuitry, called as ESD-RFIC interaction [1]- [3].…”

“…are degrades because of the parasitic C ESD and R ESD . And these parasitic can corrupt the critical I/O impedance matching scheme of any RF IC, which will degrade the performance of RFIC [1], [3].Hence ESD protection issue is become more and more difficult due to shrinking of technology. Due to higher frequencies in gigahertz range, parasitic capacitance works as a short path & majorly effects on the performance of core circuitry; because of it improper match with circuit.…”