Estimation and Analysis of Higher-Order Harmonics in Advanced Integrated Circuits to Implement Noise-Free Future-Generation Micro- and Nanoelectromechanical Systems

Abstract

This work deals with the analysis of spectrum generation from advanced integrated circuits in order to better understand how to suppress the generation of high harmonics, especially in a given frequency band, to design and implement noise-free systems. At higher frequencies, the spectral components of signals with sharp edges contain more energy. However, current closed-form expressions have become increasingly unwieldy to compute higher-order harmonics. The study of spectrum generation provides an insight into suppressing higher-order harmonics (10th order and above), especially in a given frequency band. In this work, we discussed the influence of transistor model quality and input signal on estimates of the harmonic contents of switching waveforms. Accurate estimates of harmonic contents are essential in the design of highly integrated micro- and nanoelectromechanical systems. This paper provides a comparative analysis of various flip-flop/latch topologies on different process technologies, i.e., 130 and 65 nm. An FFT plot of the simulated results signifies that the steeper the spectrum roll-off, the lesser the content of higher-order harmonics. Furthermore, the results of the comparison illustrate the improvement in the rise time, fall time, clock-Q delay and spectrum roll-off on the better selection of slow-changing input signals and more accurate transistor models.

Exploring the impact of initial design techniques on area, timing, and power in technology mapped designs: A case study on 32-bit arithmetic logic unit

“…It merits mention that the ALU design incorporates a deliberate two-clock cycle delay to optimize its functionality. To validate the VHDL code's adherence to the anticipated behavior of the 32-bit ALU, rigorous simulations and verification procedures were conducted employing the Cadence simulation tool, specifically NCSIM (Gan et al, 2015;Huang et al, 2018;Han, 2013;Iannacci, 2021;Jha et al, 2014;Khan, 2023;Khan et al, 2021).…”

Design and Comparative Analysis of High Speed and Low Power ALU Using RCA and Sklansky Adders for High-Performance Systems

“…The Arithmetic Logic Unit (ALU) is a key element of a processor that performs arithmetic and logical operations on binary numbers [1][2][3][4][5][6][7]. Several 32-bit ALUs have been designed and coded in VHDL [8][9][10][11][12][13]. An ALU consists of three major parts: Adder, logic unit, and shifter.…”