Etching of Tantalum in Fluorine‐Containing High Density Plasmas

Hsiao, R.; Miller, Dolores C.

doi:10.1149/1.1837195

Cited by 14 publications

(10 citation statements)

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“…By integrating the area under the 4f 7/2 bands, one obtains the following distribution among the different chemical states: 5% Ta 0 , 8% Ta +1 , and 87% Ta 2 O 5 . These results are consistent with previously published data on tantalum foils exposed to air [22,23,28].…”

Section: Shown Insupporting

confidence: 93%

“…Tantalum was studied because it exhibits reaction chemistry similar to that of plutonium and may be used as a surrogate material for the actinide metals [2,[21][22][23][24]. Although it should be noted that the etching rate of plutonium is about ten times slower than that observed for tantalum under the same conditions [2,21].…”

Section: Surface Chemistry Of Metal Etchingmentioning

confidence: 99%

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Atmospheric-Pressure Plasma Cleaning of Contaminated Surfaces

Hicks¹,

Selwyn²

2001

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Section: Shown Insupporting

confidence: 93%

Section: Surface Chemistry Of Metal Etchingmentioning

confidence: 99%

Atmospheric-Pressure Plasma Cleaning of Contaminated Surfaces

Hicks¹,

Selwyn²

2001

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“…To demonstrate the Ta 2 O 5 -Teflon-AF R dielectric system the top aluminium layer in figure 2(b) was replaced by sputtered tantalum and patterned using the same mask. Tantalum can be etched in fluorine-containing plasmas such as CF 4 , SF 6 , CF 3 Cl with CH 3 F, sometimes mixed with O 2 [14], [15]. The drawback is that these processes will potentially attack any underlying PECVD SiO 2 layer, which may be problematic if the tantalum etching is not uniform.…”

Section: B Anodic Ta 2 O 5 Processmentioning

confidence: 99%

Anodic Ta2O5 for CMOS compatible low voltage electrowetting-on-dielectric device fabrication

Parkes

Haworth

et al. 2007

ESSDERC 2007 - 37th European Solid State Device Research Conference

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This paper reports a CMOS compatible fabrication procedure that enables ElecroWetting On Dielectric (EWOD) technology to be post-processed on foundry technology. With driving voltages less than 15V it is believed to be the lowest reported driving voltage for any material system compatible with post-processing on integrated circuits. The process architecture uses anodically grown tantalum pentoxide as the pinhole free high dielectric constant insulator with the overlying 16nm layer of Teflon-AF R , which provides the hydrophobic surface upon which droplets can be manipulated. This stack provides a very robust dielectric, which maintains a sufficiently high capacitance per unit area for effective operation at the lower voltage favoured by more standard CMOS technology. The paper demonstrates that the sputtered tantalum layer can be integrated with the aluminium (or copper) interconnect of foundry CMOS processes by standard microfabrication techniques. I. IIn recent years lab-on-a-chip and bio-MEMS systems, which can manipulate and analyse biological fluidic samples in micro-and nano-litre scales, have emerged as a solution for automating repetitive laboratory tasks [1], [2]. Digital microfluidic devices based on technologies such as dielectrophoresis (DEP), electrowetting on dielectrics (EWOD) and surface acoustic waves (SAW) provide a potentially reconfigurable method of obtaining a bio-MEMS system [2], [3]. Of these, EWOD technology is an attractive option that has a low power consumption making it well suited for the design and manufacture of microfluidic systems [2]. EWOD uses surface tension as a driving force, which can be controlled by applying a suitable voltage to an array of electrodes covered by a two layer dielectric.A key parameter in EWOD technology is the driving voltage V. The initial work on electrowetting arrays required driving voltages in the range 80-100V [4]. More recently with a more judicious choice of materials, processes and dielectric thickness, the voltage required to manipulate droplets has been reduced below 15V [4]. However, the temperatures required for the deposition of one of these dielectric layers is well in excess of 450 o C [5] making the process non-compatible with CMOS post-processing. This paper reports a process architecture that matches the driving voltage of [4] while not involving processing temperatures anywhere near 450 o C. A. BackgroundThe technology of the electrocapillary phenomenon has been extensively described elsewhere [1], and will only be discussed briefly. For an EWOD system, the Young-Lippmann equation describes the wetting angle change for a droplet in terms of the applied voltage V, the relative dielectric constant ε r , the liquid-gas surface tension γ lg and the thickness t of the dielectric:Equation (1) identifies the important role played by the dielectric covering the electrodes in determining the driving voltage V required to modify the contact angle θ (40 o typically required for droplet movement). From the Young-Lippmann equation, it is...

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“…It can be etched in fluorine-containing plasmas such as CF 4 , SF 6 , and CF 3 Cl with CH 3 F, sometimes mixed with O 2 [17,18]. The drawback is that these processes will potentially attack any underlying PECVD SiO 2 layer, which may be problematic if the tantalum etching is not uniform.…”

Section: Structure Design and Fabricationmentioning

confidence: 99%