Evaluating large grain TMR and selective partial reconfiguration for soft error mitigation in SRAM-based FPGAs

Azambuja, Jose Rodrigo; Sousa, Fernando; Rosa, Lucas; Kastensmidt, Fernanda Lima

doi:10.1109/iolts.2009.5195990

Cited by 25 publications

(5 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Implemented methods for the synchronization utilized the second approach. We used methods similar to [14] and [13], the state synchronization for FSM-based part of the system was combined with roll forward recovery for the application part of the system. We did not use any circuit for predicting future state as in [14] because SPI communication with MCP2515 circuit in HW layer should not be interrupted.…”

Section: Resultsmentioning

confidence: 99%

“…We used methods similar to [14] and [13], the state synchronization for FSM-based part of the system was combined with roll forward recovery for the application part of the system. We did not use any circuit for predicting future state as in [14] because SPI communication with MCP2515 circuit in HW layer should not be interrupted. Thus, waiting for an inactive state is in this case better solution than to allow to perform the synchronization in various states of the CANCTRL.…”

Section: Resultsmentioning

confidence: 99%

“…Regardless, their approach can be highly applicable also for the synchronization. In [14], method for synchronization in FSM-based systems is presented. It uses the principle of predicting a future state (checkpoint state) to which the system will soon converge and presetting the reconfigured circuit to it.…”

Section: Synchronizationmentioning

confidence: 99%

See 2 more Smart Citations

Towards a state synchronization methodology for recovery process after partial reconfiguration of fault tolerant systems

Szurman¹,

Mičulka

Kotásek

2014

2014 9th International Conference on Computer Engineering &Amp; Systems (ICCES)

View full text Add to dashboard Cite

Modern fault tolerant systems implemented into FPGAs integrate very often hardware redundancy together with fault tolerant approaches based on active fault recovery and the system reconfiguration. Space and safety-critical applications are examples of systems where the principles of fault tolerance and recovery techniques have increasing importance. Except of fault-masking behavior and FPGA partial reconfiguration, also the synchronization of reconfigured circuit copy with remaining circuits which are during the recovery process still operating,is an integral part of the recovery process in these systems.The synchronization process is closely related to the system architecture, specific requirements and functionality. Our aim is to propose specific methodology to design and implement the most suitable synchronization procedure for the recovery of target fault tolerant system. In this paper, basic principles of our synchronization methodology are described together with generic architecture for synchronization in fault tolerant systems, which was designed for reconfigurable fault tolerant CAN bus control system. This system and performed experiments are in the paper described as well.

show abstract

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

See 1 more Smart Citation

Towards a state synchronization methodology for recovery process after partial reconfiguration of fault tolerant systems

Szurman¹,

Mičulka

Kotásek

2014

2014 9th International Conference on Computer Engineering &Amp; Systems (ICCES)

View full text Add to dashboard Cite

show abstract

“…Very similar to the already mentioned approaches, a so-called Generic Partial Reconfiguration Controller receives error signals from reconfigurable modules and triggers ondemand scrubbing if required [Straka et al 2010b]. Azambuja et al also use majority voters as failure detection mechanisms and scrub a faulty reconfigurable module only after a failure has been detected [Azambuja et al 2008;Azambuja et al 2009]. The authors emphasise the increased repair speed compared to a full reconfiguration.…”

Section: Methodology Attributesmentioning

confidence: 99%

Mitigation of Radiation Effects in SRAM-Based FPGAs for Space Applications

Siegle

Vladimirova

Ilstad³

et al. 2015

ACM Comput. Surv.

View full text Add to dashboard Cite

The use of static random access memory (SRAM)-based field programmable gate arrays (FPGAs) in harsh radiation environments has grown in recent years. These types of programmable devices require special mitigation techniques targeting the configuration memory, the user logic, and the embedded RAM blocks. This article provides a comprehensive survey of the literature published in this rich research field during the past 10 years. Furthermore, it can also serve as a tutorial for space engineers, scientists, and decision makers who need an introduction to this topic.

show abstract

“…There are, however, also some drawbacks like the classic problem of data re-synchronisation after repair. Rather early work in this field has been presented for instance by Paulsson et al [8], [9] and Azambuja et al [10], [11].…”

Section: Related Workmentioning

confidence: 99%

New voter design enabling hot redundancy for asynchronous network nodes

Siegle

Vladimirova

Ilstad

et al. 2014

2014 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

View full text Add to dashboard Cite

In this paper, a novel voter design is presented which allows the voting of asynchronous network streams in flow-controlled networks. The voter synchronises incoming data streams automatically and is able to handle failure modes that typically occur in streaming applications. The voter degrades to a comparator if one of the redundant channels has failed and reintegrates the channels once they are functional again. While the voter is mainly intended to be connected to a routing switch of the network, it also comprises a broadcast mechanism that enables a stand-alone operation. The design has been successfully implemented in hardware and evaluated by means of fault injection experiments.

show abstract

Evaluating large grain TMR and selective partial reconfiguration for soft error mitigation in SRAM-based FPGAs

Cited by 25 publications

References 5 publications

Towards a state synchronization methodology for recovery process after partial reconfiguration of fault tolerant systems

Towards a state synchronization methodology for recovery process after partial reconfiguration of fault tolerant systems

Mitigation of Radiation Effects in SRAM-Based FPGAs for Space Applications

New voter design enabling hot redundancy for asynchronous network nodes

Contact Info

Product

Resources

About