Evolution of nanocrystalline silicon thin film transistor channel layers

Cheng, I-Chun; Allen, Steven; Wagner, S.

doi:10.1016/j.jnoncrysol.2004.03.076

Cited by 45 publications

(28 citation statements)

References 23 publications

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“…However, the hole mobility was low (0.031 cm 2 /V.s) so that the performance of the inverter was poor. Lastly [4], the same group improved the hole mobility still 0.25 cm 2 /V.s by using more complicated process.…”

Section: Resultsmentioning

confidence: 88%

Top-gate microcrystalline silicon TFTs processed at low temperature (<200 °C)

et al. 2005

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Abstract. N type as well P type top gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200°C. The active layer is an undoped µc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs) doped µc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2 -N type c-Si structures using this insulator present low flat-band voltage, -0.2V, and low density of states at the interface D it =6,4 x 10 10 eV -1 cm -2 . High field effect mobility, 25 cm 2 /V.s for electrons and 1.1 cm 2 /V.s for holes, is obtained. These values are very high particularly the hole mobility that it was never reached previously. .

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Section: Resultsmentioning

confidence: 88%

Top-gate microcrystalline silicon TFTs processed at low temperature (<200 °C)

et al. 2005

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“…10 and 12͒ and a low series resistance between the drain/source contacts and the charge carrier accumulation region. 13 The i-c-Si: H channel layer was deposited by PECVD at a deposition temperature of 160°C and plasma excitation frequency of 13.56 MHz, in the high pressure ͑1330 Pa͒ and high power ͑0.3 W / cm 2 ͒ regime, which facilitates the deposition of material at high deposition rates a͒ Electronic mail: d.knipp@jacobs-university.de. of up to 25 nm/min.…”

Section: Device Fabricationmentioning

confidence: 99%

Ambipolar charge transport in microcrystalline silicon thin-film transistors

Knipp¹,

Chan²,

Gordijn³

et al. 2011

Journal of Applied Physics

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Hydrogenated microcrystalline silicon ͑c-Si: H͒ is a promising candidate for thin-film transistors ͑TFTs͒ in large-area electronics due to high electron and hole charge carrier mobilities. We report on ambipolar TFTs based on c-Si: H prepared by plasma-enhanced chemical vapor deposition at temperatures compatible with flexible substrates. Electrons and holes are directly injected into the c-Si: H channel via chromium drain and source contacts. The TFTs exhibit electron and hole charge carrier mobilities of 30-50 cm 2 / V s and 10-15 cm 2 / V s, respectively. In this work, the electrical characteristics of the ambipolar c-Si: H TFTs are described by a simple analytical model that takes the ambipolar charge transport into account. The analytical expressions are used to model the transfer curves, the potential and the net surface charge along the channel of the TFTs. The electrical model provides insights into the electronic transport of ambipolar c-Si: H TFTs.

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“…Seeding layers may be used to improve crystallinity and reduce the off-state current of TG-TFTs [11,12]. However, the main application of TFTs is as the pixel control in active matrix displays, almost all of which are currently based on liquid crystal technology and use a-Si:H TFTs.…”

Section: Introductionmentioning

confidence: 99%