The reduction of nanoelectronic devices to sub-10 nm sizes raises the prospect of electronics at the atomic scale, while also facilitating studies on nanoscale device physics. Single-atom transistors, where the current-switching element is formed by one atom and the information packet size is reduced to one electron, can create electronic switches scaled to their ultimate physical limits. Hitherto, single-atom transistor operation has been limited to low temperatures due to shallow quantum wells, which inhibit room-temperature nanoelectronic applications. Furthermore, the interaction between multiple single-atom elements at room temperature has yet to be demonstrated. Here, we show that quantum interactions between P dopants in Si/SiO 2 /Si single-atom transistors lead to room-temperature double quantum dot behavior. Hexagonal regions of charge stability and gate-controlled tunnel coupling between P atoms are observed at room temperature. Image processing is used to help reduce observer bias in data analysis. Single-electron device simulation is used to investigate evolution of the charge-stability region with varying capacitance and resistance. In combination with extracted tunnel capacitances and resistances, this allows experimental trends to be reproduced and provides information on the dopant-atom arrangement.At present, most single-atom transistors use donor [3,4,[9][10][11][12][13][14][15][16] and acceptor [1,2] substitutional impurity atoms within the Si channel of a field-effect transistor or single atoms deposited on atomically flat surfaces by scanning probe methods [4]. In these devices, electronic states associated with individual dopant-atom QDs [1,3,9,10] and with electrostatically coupled double QDs within a dopantatom array [14][15][16] are measured and interactions between dopant-atom arrays formed by single-ion implantation methods [11] are characterized. However, such approaches rely on shallow, about 10-50 meV in depth, potential wells [3], which are insufficient to confine electrons at room temperature (RT). Device operation is thus limited to cryogenic temperatures only. While this is not a restriction for spectroscopic investigations of atomic states using electron tunneling [4], or for the definition of spin qubits using phosphorous (P) dopant atoms in silicon [17,18], the lack of RT operation prevents wider more general nanoelectronic logic, memory, or sensor applications.Confining dopant atoms using tunnel barriers with heights that are considerably greater than those of the thermal fluctuations, k B T = 25 meV at RT = 290 K, can enable the formation of RT single-atom transistors [19].