Experimental and 2D simulation study of the single-event burnout in N-channel power MOSFETs

Roubaud, F.; Dachs, C.; Palau, J.M.; Gasiot, J.; Tastet, P.

doi:10.1109/23.273458

Cited by 50 publications

(13 citation statements)

References 9 publications

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“…The less sensitive area is found in the P + region, because of its large capacity of charge collection. These simulation results are consistent with those obtained in various studies as much for simulations as experiments [2,5,18,19]. Thus, for large values of V DS this region can be considered to be the sensitive area for the formation of latent damages [20].…”

Section: Determination Of the Sensitive Volume In Each Devicesupporting

confidence: 91%

Analysis study of sensitive volume and triggering criteria of single‐event burnout in super‐junction metal‐oxide semiconductor field‐effect transistors

Zerarka

Austin

Morancho

et al. 2014

IET Circuits, Devices & Systems

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Power metal-oxide semiconductor field effect transistors (MOSFETs) are more and more used in atmospheric and space applications. Thus, it is essential to study the influence of the natural radiation environment on the electrical behaviour of vertical double-diffused metal-oxide semiconductor (VDMOS) and super-junction (SJ) MOSFETs. Two-dimensional numerical simulations are performed to define the sensitive volume and triggering criteria of single-event burnout (SEB) for VDMOS and SJ MOSFETs for different configurations of ionising tracks. The analysis of the results allows a better understanding of the SEB mechanism in each structure and allows the behaviour and robustness comparison for these two technologies under heavy-ion irradiation.

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Section: Determination Of the Sensitive Volume In Each Devicesupporting

confidence: 91%

Analysis study of sensitive volume and triggering criteria of single‐event burnout in super‐junction metal‐oxide semiconductor field‐effect transistors

Zerarka

Austin

Morancho

et al. 2014

IET Circuits, Devices & Systems

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“…It is seen that SEB occurs under 38-V drain voltage. Burnout does not occur if the value of V DS is too small [34], [35]. It is known that the addition of a buffer layer can improve the SEB performance [10].…”

Section: Seb Simulation Resultsmentioning

confidence: 98%

Single-Event Burnout Hardened Structure of Power UMOSFETs With Schottky Source

Wang

Zhang

Cao

et al. 2014

IEEE Trans. Power Electron.

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This paper investigates the single-event burnout (SEB) simulation results for both the standard and hardened structure of power U-shape gate MOSFETs (UMOSFETs). The Schottky source is proposed to reduce the work of the parasitic bipolar transistor inherent to the device. The hardened structure of power UMOSFETs with the Schottky source and N buffer layer is given, which can work normally and improve the SEB performance effectively. Both 70-and 120-V power MOSFETs are simulated and discussed in this paper. The SEB threshold voltages are increased to more than 94 percent of the breakdown voltages for both 70-and 120-V hardened structure, compared to 54 percent for standard power UMOSFETs.Index Terms-Hardened structure, power UMOSFET, Schottky source, single-event burnout (SEB).

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“…This environment is composed of particles of various nature and energy which can cause the destruction of these devices. So as to protect against NRE effects, many studies have been carried out to understand the single-event burnout (SEB) failure mechanism in MOSFET devices [1]- [6]. However, although the basic mechanism is now well defined, the definition of the most relevant test conditions to determine the SEB susceptibility is still uncertain.…”

Section: Introductionmentioning

confidence: 99%