Experimental and simulation study of fill-factor enhancement using a virtual guard ring in n+/p-well CMOS single-photon avalanche diodes

Poushi, Seyed Saman Kohneh; Mahmoudi, Hiwa; Hofbauer, Michael; Steindl, Bernhard; Schneider-Hornstein, Kerstin; Zimmermann, Horst

doi:10.1117/1.oe.60.6.067105

Cited by 4 publications

(5 citation statements)

References 20 publications

(19 reference statements)

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“…A 1.5 µm wide virtual guard ring (The n+ diameter is 32 µm.) prevents premature edge The reach-through SPAD was described in detail in [18,19]. Only 19 V are needed to deplete the thick absorption zone fully [18].…”

Section: Structure Of Spadmentioning

confidence: 99%

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A BiCMOS Active Quencher Using an Inverter-Based Differential Amplifier in the Comparator

Goll,

Hofbauer,

Zimmermann

2024

IEEE Solid-State Circuits Lett.

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For fast switching off of a firing single-photon avalanche diode, an active quenching circuit in 0.35 µm BiCMOS technology with a very fast quenching slew rate is introduced. Quenching transients measured at an integrated small prober pad are shown. An NPN transistor as quenching switch leads to an active quenching time of 250 ps and a quenching slew rate of 21.1 V/ns. A self-biased two-inverter differential amplifier used in the comparator makes this fast quenching possible. By the implementation of cascoding, the excess bias voltage of the integrated SPAD can be doubled to 6.6 V with respect to the nominal supply voltage of 3.3 V of the BiCMOS process used. Active resetting of the SPAD is achieved in 725 ps. The power consumption of the BiCMOS quenching circuit is 16.3 mW at 40 Mcounts/s and 3 mW in the idle state.

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Section: Structure Of Spadmentioning

confidence: 99%

“…The capacitance of the SPAD used here is 15 fF according to device simulations with ATLAS [20]. The photon detection probability of the SPAD achieves its maximum (35%) at a wavelength of 635 nm with an excess voltage of 6.6 V [19].…”

Section: Structure Of Spadmentioning

confidence: 99%

A BiCMOS Active Quencher Using an Inverter-Based Differential Amplifier in the Comparator

Goll,

Hofbauer,

Zimmermann

2024

IEEE Solid-State Circuits Lett.

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“…This degradation is more noticeable in the scaled-down APD, where the dimensions of the guard ring are comparable to the photos-sensitive area dimensions. Accordingly, the scalability of such APDs to be used in multi-pixel detectors is an issue [ 21 , 22 , 23 ].…”

Section: Introductionmentioning

confidence: 99%

Area and Bandwidth Enhancement of an n+/p-Well Dot Avalanche Photodiode in 0.35 μm CMOS Technology

Poushi

Goll

Schneider-Hornstein

et al. 2023

Sensors

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This paper presents a CMOS-integrated dot avalanche photodiode (dot-APD) that features a small central n+/p-well hemispherical cathode/p-well structure circularly surrounded by an anode ring. The dot-APD enables wide hemispherical depletion, charge collection from a large volume, and a small multiplication region. These features result in a large light-sensitive area, high responsivity and bandwidth, and exceptionally low junction capacitance. The active area can be further expanded using a multi-dot structure, which is an array of several cathode/p-well dots with a shared anode. Experimental results show that a 5 × 5 multi-dot APD with an active area of 70 μm × 70 μm achieves a bandwidth of 1.8 GHz, a responsivity of 9.7 A/W, and a capacitance of 27 fF. The structure of the multi-dot APD allows for the design of APDs in various sizes that offer high bandwidth and responsivity as an optical detector for various applications while still maintaining a small capacitance.

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“…In recent work, a virtual guard ring rather than a physical guard ring is used for avoiding the edge breakdown effect and improving the fill factor and scalability of an n+/p-well single photon avalanche diode device. That design was investigated and implemented in 0.35 μm pin-photodiode CMOS technology [4]. In another work, an ultrathin avalanche photodiode (APD) consisting of n++/p-well and an n-well guard ring was proposed (Figure 1).…”

Section: Introductionmentioning

confidence: 99%

A novel design of a silicon PIN diode for increasing the breakdown voltage

Rezaei

Nayeri

Rezaeian

2022

IET Circuits, Devices & Syst

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This paper presents a new structure consisting of a silicon PIN junction with high breakdown voltage and low dark current with two Guard rings. To achieve the optimal structure, the effect of the parameters on the breakdown voltage and the dark current of the device has been investigated and simulated. The intrinsic thickness and impurity, the penetration depth of the active area and guard rings, location and number of guard rings, thickness, and distance between guard rings are the effective parameters of the device's breakdown voltage and dark current. In the proposed structure by placing two guard rings around the active area, the results show that an electric field is distributed at the edge of the active area between the guard rings, which leads to an increase of 292.62 V in breakdown voltage compared to the device without a guard ring.

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Experimental and simulation study of fill-factor enhancement using a virtual guard ring in n+/p-well CMOS single-photon avalanche diodes

Cited by 4 publications

References 20 publications

A BiCMOS Active Quencher Using an Inverter-Based Differential Amplifier in the Comparator

A BiCMOS Active Quencher Using an Inverter-Based Differential Amplifier in the Comparator

Area and Bandwidth Enhancement of an n+/p-Well Dot Avalanche Photodiode in 0.35 μm CMOS Technology

A novel design of a silicon PIN diode for increasing the breakdown voltage

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