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The use of a physical guard ring in CMOS single-photon avalanche diodes (SPADs) based on n þ /(deep)p-well and p þ /(deep)n-well structures is a common solution to control the electric field of the SPADs periphery and prevent the premature lateral breakdown. However, this leads to a decrease of the detection efficiency, i.e., the fill-factor, especially when the SPADs size is reduced. Our paper presents an experimental and simulation study on replacing the physical guard ring by a virtual guard ring to improve the fill-factor and the scalability of a n þ ∕p-well SPAD implemented in 0.35-μm pin-photodiode CMOS technology. Accordingly, the optimization of the virtual guard ring and its superiority at downscaling are discussed, and the SPAD scalability in size with respect to the fill-factor is quantified in this technology. © The Authors.Published by SPIE under a Creative Commons Attribution 4.0 Unported License. Distribution or reproduction of this work in whole or in part requires full attribution of the original publication, including its DOI.

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This paper presents a CMOS-integrated dot avalanche photodiode (dot-APD) that features a small central n+/p-well hemispherical cathode/p-well structure circularly surrounded by an anode ring. The dot-APD enables wide hemispherical depletion, charge collection from a large volume, and a small multiplication region. These features result in a large light-sensitive area, high responsivity and bandwidth, and exceptionally low junction capacitance. The active area can be further expanded using a multi-dot structure, which is an array of several cathode/p-well dots with a shared anode. Experimental results show that a 5 × 5 multi-dot APD with an active area of 70 μm × 70 μm achieves a bandwidth of 1.8 GHz, a responsivity of 9.7 A/W, and a capacitance of 27 fF. The structure of the multi-dot APD allows for the design of APDs in various sizes that offer high bandwidth and responsivity as an optical detector for various applications while still maintaining a small capacitance.

This paper presents a new Si CMOS linear-mode avalanche photodiode (APD) based on an electric field distribution formed by field-line crowding. In this structure, a spherical avalanching electric field is enforced by field-line crowding due to the curvature of the half-sphere cathode (n-well). The electric field extends radially and, therefore, the entire lowdoped epitaxial layer serves as charge collection zone. This APD can provide high responsivity and bandwidth due to its thick absorption zone and drift-based carrier transport. Measurements using a 675 nm laser source at 200 nW optical power show a maximum bandwidth of 1.6 GHz while the responsivity is 32 A/W. In addition, a maximum responsivity of 3.05×10 3 A/W at 5 nW optical power is achieved. Due to the high avalanche gain, large bandwidth, and CMOS compatibility without any process modification, this APD is a promising optical detector for many applications.Index Terms-Avalanche photodiode (APD), field-line crowding, CMOS integrated photodetector, spherical avalanching field.