Experimental demonstration of nanomagnet networks as hardware for Ising computing

Debashis, Punyashloka; Faria, Rafatul; Appenzeller, Joerg; Datta, Supriyo; Chen, Zhihong

doi:10.1109/iedm.2016.7838539

Cited by 48 publications

(37 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…1 is obtained by coupling the circuit shown in Fig. 1 with a low-barrier circular nanomagnet that does not have an easy axis (H K → 0) and no energy barrier (E A = 0) that favors a magnetization axis [27,28]. The magnetization of such a magnet fluctuates randomly in the plane, in the presence of thermal noise.…”

Section: Example #1: Tunable Randomnessmentioning

confidence: 99%

Equivalent Circuit for Magnetoelectric Read and Write Operations

et al. 2018

Self Cite

View full text Add to dashboard Cite

We describe an equivalent circuit model applicable to a wide variety of magnetoelectric phenomena and use SPICE simulations to benchmark this model against experimental data. We use this model to suggest a different mode of operation where the "1" and "0" states are not represented by states with net magnetization (like mx, my or mz) but by different easy axes, quantitatively described by (m 2x − m 2 y ) which switches from "0" to "1" through the write voltage. This change is directly detected as a read signal through the inverse effect. The use of (m 2x − m 2 y ) to represent a bit is a radical departure from the standard convention of using the magnetization (m) to represent information. We then show how the equivalent circuit can be used to build a device exhibiting tunable randomness and suggest possibilities for extending it to non-volatile memory with read and write capabilities, without the use of external magnetic fields or magnetic tunnel junctions.

show abstract

Section: Example #1: Tunable Randomnessmentioning

confidence: 99%

Equivalent Circuit for Magnetoelectric Read and Write Operations

et al. 2018

Self Cite

View full text Add to dashboard Cite

show abstract

“…Low barrier magnets can be obtained by adjusting the thickness t of perpendicular anisotropy (PMA) magnets so that H kp ≈ 0 making ∆ P M A = H kp M s Ω/2 ≈ 0 or by making in-plane anisotropy (IMA) magnet's shape circular so that H ki ≈ 0 making ∆ IM A = H ki M s Ω/2 ≈ 0. Such magnets with diameters that are less than about 100 nm have been shown to exhibit monodomain behavior [19]- [21]. It is important to note that while modifying existing interfacial PMA free layers by modulating the thickness to make them IMA seems relatively straightforward, replacing highly optimized fixed PMA layers [22] with IMA stacks could prove more challenging.…”

Section: Introductionmentioning

confidence: 99%

Low-Barrier Magnet Design for Efficient Hardware Binary Stochastic Neurons

et al. 2019

Self Cite

View full text Add to dashboard Cite

Binary stochastic neurons (BSN's) form an integral part of many machine learning algorithms, motivating the development of hardware accelerators for this complex function. It has been recognized that hardware BSN's can be implemented using low barrier magnets (LBM's) by minimally modifying presentday magnetoresistive random access memory (MRAM) devices. A crucial parameter that determines the response of these LBM based BSN designs is the correlation time of magnetization, τc. In this letter, we show that for magnets with low energy barriers (∆ ≈ kBT and below), circular disk magnets with inplane magnetic anisotropy (IMA) lead to τc values that are two orders of magnitude smaller compared to τc for magnets having perpendicular magnetic anisotropy (PMA) and provide analytical descriptions. We show that this striking difference in τc is due to a precession-like fluctuation mechanism that is enabled by the large demagnetization field in IMA magnets. We provide a detailed energy-delay performance evaluation of previously proposed BSN designs based on Spin-Orbit-Torque (SOT) MRAM and Spin-Transfer-Torque (STT) MRAM employing low barrier circular IMA magnets by SPICE simulations. The designs exhibit sub-ns response times leading to energy requirements of ∼a few fJ to evaluate the BSN function, orders of magnitude lower than digital CMOS implementations with a much larger footprint. While modern MRAM technology is based on PMA magnets, results in this paper suggest that low barrier circular IMA magnets may be more suitable for this application.Index Terms-Binary stochastic neuron, hardware implementation, low barrier magnet, embedded MTJ, probabilistic computing

show abstract

“…This can be done with perpendicular magnets (PMA) designed to be close to the in-plane transition. A less challenging approach seems to be to use circular in-plane magnets (IMA) [7][8][9] . We will refer to all these possibilities collectively as LBM's as opposed to say superparamagnets which have more specific connotations in different contexts 3,[10][11][12][13][14][15] .…”

Section: A Between a Bit And A Q-bitmentioning

confidence: 99%

p-bits for probabilistic spin logic

Çamsarı

Sutton

Datta

2019

Applied Physics Reviews

Self Cite

156

View full text Add to dashboard Cite

We introduce the concept of a probabilistic or p-bit, intermediate between the standard bits of digital electronics and the emerging q-bits of quantum computing. We show that low barrier magnets or LBM's provide a natural physical representation for p-bits and can be built either from perpendicular magnets (PMA) designed to be close to the in-plane transition or from circular in-plane magnets (IMA). Magnetic tunnel junctions (MTJ) built using LBM's as free layers can be combined with standard NMOS transistors to provide threeterminal building blocks for large scale probabilistic circuits that can be designed to perform useful functions. Interestingly, this three-terminal unit looks just like the 1T/MTJ device used in embedded MRAM technology, with only one difference: the use of an LBM for the MTJ free layer. We hope that the concept of p-bits and p-circuits will help open up new application spaces for this emerging technology. However, a p-bit need not involve an MTJ, any fluctuating resistor could be combined with a transistor to implement it, while completely digital implementations using conventional CMOS technology are also possible. The p-bit also provides a conceptual bridge between two active but disjoint fields of research, namely stochastic machine learning and quantum computing. First, there are the applications that are based on the similarity of a p-bit to the binary stochastic neuron (BSN), a well-known concept in machine learning. Three-terminal p-bits could provide an efficient hardware accelerator for the BSN. Second, there are the applications that are based on the p-bit being like a poor man's q-bit. Initial demonstrations based on full SPICE simulations show that several optimization problems including quantum annealing are amenable to p-bit implementations which can be scaled up at room temperature using existing technology. CONTENTS

show abstract

Experimental demonstration of nanomagnet networks as hardware for Ising computing

Cited by 48 publications

References 3 publications

Equivalent Circuit for Magnetoelectric Read and Write Operations

Equivalent Circuit for Magnetoelectric Read and Write Operations

Low-Barrier Magnet Design for Efficient Hardware Binary Stochastic Neurons

p-bits for probabilistic spin logic

Contact Info

Product

Resources

About