1994
DOI: 10.1109/55.289472
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Experimental high performance sub-0.1 /spl mu/m channel nMOSFET's

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Cited by 50 publications
(12 citation statements)
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“…Since the annealing treatment of the implanted targets was performed under oxygen atmosphere, a layer of SiO 2 oxide has been formed on the samples surface. Hence, during the annealing, we suppose that antimony ions are forced to migrate to Si/SiO 2 interface because of the low diffusivity of Sb in Si [2,3] and the lower diffusivity of Sb in SiO 2 [9]. Consequently, after the etching (with HF) of the annealed samples, the SiO 2 layer is removed and an important quantity of antimony is lost.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…Since the annealing treatment of the implanted targets was performed under oxygen atmosphere, a layer of SiO 2 oxide has been formed on the samples surface. Hence, during the annealing, we suppose that antimony ions are forced to migrate to Si/SiO 2 interface because of the low diffusivity of Sb in Si [2,3] and the lower diffusivity of Sb in SiO 2 [9]. Consequently, after the etching (with HF) of the annealed samples, the SiO 2 layer is removed and an important quantity of antimony is lost.…”
Section: Resultsmentioning
confidence: 99%
“…The antimony is a donor, it is particularly attractive for the fabrication of very shallow junctions (thickness <0.1 m) [1]. This is due to its high mass and low diffusivity in Si [2,3]. During the annealing treatment (at high temperatures ∼1173 K (900 • C)) of antimony implanted Si targets, an outdiffusion and a considerable loss of Sb + ions are generally noticed [4].…”
Section: Introductionmentioning
confidence: 99%
“…First, it is worst noting that whatever the temperature and the architecture are, large values of R sd are deduced: 1600 µm −1 at 293 K as compared with the value of nearly 300 µm −1 obtained in the best optimized drain structure ( [10] for example in the case of a 0.1 µm nMOSFET). The 25% decrease of R sd from 293 K down to 77 K is due to the reduction of the resistivity in degenerate semiconductor region: the deep source and drain region mainly.…”
Section: Series Resistancementioning
confidence: 99%
“…Even MOSFETs as small as 10 nm h Since these structures are acutely small their design, fabrication and understanding requires proper knowledge of device physics at both the sub micrometre and nanometre level. The simplified diagram of cross-section of a nano MOSFET Crystal surface in the <100 orientation> is used while constructing N type Silicon wafers [16][17][18][19][20][21]. A retrograde type of channel doping profile is being utilised that grants for the utilisation of a high subsurface doping (5 × 10 17 the drain electric field from entering the sourc cm-3 is done to retain the threshold voltage at a low level.…”
Section: Nanoscale Mosfetsmentioning
confidence: 99%