2017 16th International Superconductive Electronics Conference (ISEC) 2017
DOI: 10.1109/isec.2017.8314191
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Experimental Investigation of ERSFQ Circuit for Parallel Multibit Data Transmission

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Cited by 10 publications
(5 citation statements)
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“…The complexity of superconducting circuits becomes limited to 2.5 million junctions per square centimeter under the assumption that only a quarter of the chip area can be occupied by Josephson junctions (with taking interconnects into account) [ 19 ]. The circuits can be further expanded using multi-chip module (MCM) technology [ 21 22 ].…”
Section: Reviewmentioning
confidence: 99%
“…The complexity of superconducting circuits becomes limited to 2.5 million junctions per square centimeter under the assumption that only a quarter of the chip area can be occupied by Josephson junctions (with taking interconnects into account) [ 19 ]. The circuits can be further expanded using multi-chip module (MCM) technology [ 21 22 ].…”
Section: Reviewmentioning
confidence: 99%
“…where γ is the PTL propagation constant and Z 0 is the PTL characteristic impedance. Converting this into a scattering matrix [50] and also leads to equation (3).…”
mentioning
confidence: 99%
“…The combination of low power logic [2] and low loss interconnects (e.g. [3] and references thereof) shifts the design trade-off toward heterogeneous distributed architectures with multiple chips on multiple boards. Volumetric cooling with efficient of 35 GHz and 0.58 fJ per bit has been reported in [5].…”
mentioning
confidence: 99%