2022 IEEE International Conference on Metrology for Extended Reality, Artificial Intelligence and Neural Engineering (MetroXRAI 2022
DOI: 10.1109/metroxraine54828.2022.9967583
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Experimental validation of an analog spiking neural network with STDP learning rule in CMOS technology

Abstract: We report the design in CMOS technology and the experimental characterization of an analog spiking neural network with on-chip unsupervised learning. Long-term synaptic memory is implemented using a floating-gate device in a standard 150 nm CMOS process. The neurons are operated with a voltage supply of only 0.4V, allowing an extremely low power dissipation with an energy dissipation per synaptic operation of about 55 fJ. The CMOS chip includes the circuits for implementing real-time learning of the network ba… Show more

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“…Most implement the model as explained in section 3.1 [75,77,79,80,84]. However, some exploit the physics of single transistors to propose a floating gate implementation [82,85,86]. Indiveri et al [79] presented the implementation in figure 3.…”
Section: Stdpmentioning
confidence: 99%
“…Most implement the model as explained in section 3.1 [75,77,79,80,84]. However, some exploit the physics of single transistors to propose a floating gate implementation [82,85,86]. Indiveri et al [79] presented the implementation in figure 3.…”
Section: Stdpmentioning
confidence: 99%