2017
DOI: 10.1007/978-3-319-58943-5_14
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Exploiting a Parametrized Task Graph Model for the Parallelization of a Sparse Direct Multifrontal Solver

Abstract: Abstract. The advent of multicore processors requires to reconsider the design of high performance computing libraries to embrace portable and effective techniques of parallel software engineering. One of the most promising approaches consists in abstracting an application as a directed acyclic graph (DAG) of tasks. While this approach has been popularized for shared memory environments by the OpenMP 4.0 standard where dependencies between tasks are automatically inferred, we investigate an alternative approac… Show more

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Cited by 3 publications
(3 citation statements)
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“…Several techniques have been proposed in the literature to alleviate this issue such as the pruning of its traversal [3] or hierarchical tasks [19,22,23]. The PTG model, on the other hand, has better scalability because the DAG is not explicitly and entirely built but, instead, tasks are efficiently instantiated based on rules defined by the programmer; this, however, comes at the price of a considerably higher programming effort [4].…”
Section: The Sequential Task Flow Programming Interfacementioning
confidence: 99%
“…Several techniques have been proposed in the literature to alleviate this issue such as the pruning of its traversal [3] or hierarchical tasks [19,22,23]. The PTG model, on the other hand, has better scalability because the DAG is not explicitly and entirely built but, instead, tasks are efficiently instantiated based on rules defined by the programmer; this, however, comes at the price of a considerably higher programming effort [4].…”
Section: The Sequential Task Flow Programming Interfacementioning
confidence: 99%
“…In a later work, Kim et al [13] take memory bound into consideration through Kokkos's [14] dynamic task scheduling and memory management. Agullo et al [15] also take advantage of two-level parallelism and discussed the ease of programming and the performance of the program. Targeting at distributed memory systems, Sao et al [3] partition the tree into two levels, a common ancestor with its children, and then replicate the ancestor to processors that are in charge of children; both communication time and makespan are reduced by this method, at the expense of a larger memory consumption.…”
Section: Related Workmentioning
confidence: 99%
“…We use PaRSEC to implement our SpLLT solver by expressing the DAG of the factorization algorithm presented in Section 2 in the JDF language. In a previous study [1] we investigated the use of a PTG model for implementing a multifrontal QR method and used a two-level approach where the processing of the assembly tree and the node factorization are split in two different JDFs thus separating the exploitation of tree-level and node-level parallelism. Even if this hierarchical approach facilitated the construction of the dataflow representation, it incorporated unnecessary synchronisation, prevented the exploitation of internode-level parallelism and therefore drastically impacted the scalability of the code.…”
Section: Expressing a Parallel Cholesky Factorization Using A Ptg Modelmentioning
confidence: 99%