2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography 2008
DOI: 10.1109/fdtc.2008.19
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Exploiting Hardware Performance Counters

Abstract: We introduce the usage of hardware performance counters (HPCs) as a new method that allows very precise access to known side channels and also allows access to many new side channels. Many current architectures provide hardware performance counters, which allow the profiling of software during runtime. Though they allow detailed profiling they are noisy by their very nature; HPC hardware is not validated along with the rest of the microprocessor. They are meant to serve as a relative measure and are most commo… Show more

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Cited by 65 publications
(40 citation statements)
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“…If this information is somehow inferred as explained in [10] via "prime + probe" technique by timing or hardware performance counters (HPC) [11], one can obtain specific information on an index value (i.e., bytes of AES block) that is used to access the lookup tables. For instance, if a cache line, whose index y = 5 for T 0 , is known to be not accessed during one encryption, then we can safely say that upper nibble of corresponding bytes of AES block used to access the same table in any round cannot be equal to 5.…”
Section: A Observations Made Via Micro-architectural Side-channelsmentioning
confidence: 99%
“…If this information is somehow inferred as explained in [10] via "prime + probe" technique by timing or hardware performance counters (HPC) [11], one can obtain specific information on an index value (i.e., bytes of AES block) that is used to access the lookup tables. For instance, if a cache line, whose index y = 5 for T 0 , is known to be not accessed during one encryption, then we can safely say that upper nibble of corresponding bytes of AES block used to access the same table in any round cannot be equal to 5.…”
Section: A Observations Made Via Micro-architectural Side-channelsmentioning
confidence: 99%
“…As CPUs modernas apresentam uma característica chamada de performance counters [Uhsadel et al 2008], que são registradores incrementados conforme o comportamento da CPU; istoé, são capazes de mostrar estatísticas da CPU durante um determinado espaço de tempo. Tais estatísticas são tão complexas de serem mensuradas via aplicação queé necessário que o hardware possua um circuito próprio para esse fim.…”
Section: Comportamento Do Hardwareunclassified
“…HPCs have known an increasing popularity in the last few years, bringing important contributions not only to their original application domain but also in various other fields such as program integrity checking [1] or cryptanalysis [2], where HPCs are exploited as side-channels for CPU dependant information leaks. Nonetheless HPCs are noisy by their very nature presenting a certain level of nondeterminism in the counter values, which represents a major issue in the process of accurately evaluating software products, but at the same time shows a high potential for random number generation.…”
Section: Introductionmentioning
confidence: 99%