Exploiting Idle Resources in a High-Radix Switch for Supplemental Storage

Blumrich, Matthias A.; Jiang, Nan; Dennison, Larry

doi:10.1109/sc.2018.00007

Cited by 3 publications

(4 citation statements)

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“…Therefore, current work strives to make full use of these unused input buffers in hierarchical routers. Typically, work in Reference [1] proposed Stash, which stashes packets in unused buffers on other ports, accessible via excess internal bandwidth in the hierarchical router. As shown in Figure 4 [24].…”

Section: Related Work and Backgroundmentioning

confidence: 99%

“…Another design challenge is how to meet the needs of multiple ports to access CIB at the same time. Fortunately, the odd/even interleaved banks architecture in Stash can solve this problem [1], so we adopted this structure in our design. In our design, any input port in the tile can write data to the CIB at any time.…”

Section: Centralized Input Buffer Architecturementioning

confidence: 99%

“…Figure 1 presents the utilization of input buffers in a YARC router [29]. The evaluation is performed using 1-meter endpoint links and 50-meter inter-router links [1] with 128flit depth input buffers in a 1024-node Fat Tree network [11]. As shown in Figure 1, 86.1% input buffers have a utilization lower than 10%.…”

Section: Introductionmentioning

confidence: 99%

“…Sharing input buffers between different input ports can improve the buffer utilization of hierarchical routers, and more shared input ports can achieve a more balanced buffer utilization. Work in Reference [1] proposes Stash, a new hierarchical router architecture that shares input buffer between all the input ports in the router. Stash makes full use of unused input buffer by stashing packets in the shared buffer of any port of the router.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Cib-Hier

Dong

Yang

et al. 2021

ACM Trans. Archit. Code Optim.

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Hierarchical organization is widely used in high-radix routers to enable efficient scaling to higher switch port count. A general-purpose hierarchical router must be symmetrically designed with the same input buffer depth, resulting in a large amount of unused input buffers due to the different link lengths. Sharing input buffers between different input ports can improve buffer utilization, but the implementation overhead also increases with the number of shared ports. Previous work allowed input buffers to be shared among all router ports, which maximizes the buffer utilization but also introduces higher implementation complexity. Moreover, such design can impair performance when faced with long packets, due to the head-of-line blocking in intermediate buffers. In this work, we explain that sharing unused buffers between a subset of router ports is a more efficient design. Based on this observation, we propose Centralized Input Buffer Design in Hierarchical High-radix Routers (CIB-HIER), a novel centralized input buffer design for hierarchical high-radix routers. CIB-HIER integrates multiple input ports onto a single tile and organizes all unused input buffers in the tile as a centralized input buffer. CIB-HIER only allows the centralized input buffer to be shared between ports on the same tile, without introducing additional intermediate virtual channels or global scheduling circuits. Going beyond the basic design of CIB-HIER, the centralized input buffer can be used to relieve the head-of-line blocking caused by shallow intermediate buffers, by stashing long packets in the centralized input buffer. Experimental results show that CIB-HIER is highly effective and can significantly increase the throughput of high-radix routers.

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Section: Related Work and Backgroundmentioning

confidence: 99%

Section: Centralized Input Buffer Architecturementioning

confidence: 99%